TFT array substrate and display panel
View Patent ↗The invention provides a TFT array substrate and display panel. The TFT array substrate comprises: a patterned metal oxide active layer, a patterned gate metal layer, and a patterned source/drain metal layer; and further comprises at least a patterned hydrogen-absorbing metal layer, a dielectric layer is disposed between the hydrogen-absorbing metal layer and the patterned metal oxide active layer. The TFT array substrate and display panel of the invention can reduce reaction between the hydrogen atoms and the active layer of metal oxide TFT to achieve improving reliability of TFT.
1. A thin film transistor (TFT) array substrate, comprising: a patterned metal oxide active layer, a patterned gate metal layer, and a patterned source/drain metal layer, further comprising at least a patterned hydrogen-absorbing metal layer, a dielectric layer being disposed between the hydrogen-absorbing metal layer and the patterned metal oxide active layer,
wherein the dielectric layer of the TFT array substrate comprises a material of SiOx that contains and releases hydrogen atoms, and wherein the hydrogen-absorbing metal comprises a material of titanium of which a part is combined with the hydrogen atoms released from the the material of SiOx of the dielectric layer to form titanium hydride such that the hydrogen-absorbing metal layer comprises both titanium and titanium hydride.
2. A display panel, comprising the TFT array substrate as claimed in claim 1 .
3. The TFT array substrate as claimed in claim 1 , wherein the TFT array substrate further comprises a patterned second hydrogen-absorbing metal layer, and the second hydrogen-absorbing metal layer is disposed at the bottom of the patterned gate metal layer.
4. The TFT array substrate as claimed in claim 3 , wherein the TFT array substrate further comprises a gate insulating layer disposed as a dielectric layer between the second hydrogen-absorbing metal layer and the patterned active layer.
5. The TFT array substrate as claimed in claim 1 , wherein the TFT array substrate further comprises a patterned third hydrogen-absorbing metal layer, and the third hydrogen-absorbing metal layer is disposed at the bottom of the patterned source/drain metal layer.
6. The TFT array substrate as claimed in claim 5 , wherein the TFT array substrate further comprises an interlayer insulating layer disposed as a dielectric layer between the third hydrogen-absorbing metal layer and the patterned active layer.
7. The TFT array substrate as claimed in claim 1 , wherein the TFT array substrate comprises a patterned first hydrogen-absorbing metal layer, and the first hydrogen-absorbing metal layer is disposed opposite to the patterned active layer in upper and lower manner.
8. The TFT array substrate as claimed in claim 7 , wherein the TFT array substrate further comprises a buffer layer as a dielectric layer disposed between the first hydrogen-absorbing metal layer and the patterned active layer.
9. The TFT array substrate as claimed in claim 7 , wherein the patterned first hydrogen-absorbing metal layer has an area equal to or slightly larger than the patterned active layer.