IP Library Granted Patent US 11,223,778
Granted Patent B2
US 11,223,778 · App. 16/099,803 · Granted Jan 11, 2022

Signal processing device, signal processing method, camera system, video system, and server

Inventors: Koji Kamiya (Kanagawa, JP); Hiroaki Kikuchi (Kanagawa, JP); Jun Onuki (Kanagawa, JP); Tomoyuki Endo (Tokyo, JP); Masaki Hirose (Tokyo, JP)
Assignee: SONY CORPORATION
H04N5/2355G06T1/20H04N5/202H04N5/23229H04N19/46H04N19/98H04N21/2343H04N21/4402
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Quick Facts
Patent No.
US 11,223,778
App. No.
16/099,803
Granted
Jan 11, 2022
Kind
B2
Abstract

To enable HDR video signals of a plurality of signal interfaces to be satisfactorily handled. A processing unit processes a linear high dynamic range video signal and obtains a high dynamic range video signal that has undergone a grayscale compression process. The processing unit is able to perform grayscale compression processes of a plurality of signal interfaces. For example, when a grayscale compression process of another signal interface other than a reference signal interface is performed, the processing unit further performs a process of adding characteristics of system gamma of the reference signal interface and a process of cancelling out characteristics of system gamma of the other signal interface.

Claims (18)

1. A signal processing device comprising:

circuitry configured to:

process an input video signal and obtain an output video signal that has undergone a grayscale compression process, the grayscale compression process being a part of the process,

wherein the circuitry is configured to:

perform grayscale compression processes corresponding to a plurality of signal interfaces, and

simultaneously output a plurality of the output video signals that have respectively undergone the grayscale compression processes corresponding to the plurality of signal interfaces,

wherein the circuitry is further configured to perform at least a process of adding characteristics of system gamma of a reference signal interface when a grayscale compression process of another signal interface other than the reference signal interface is performed.

2. The signal processing device according to claim 1 ,

wherein the circuitry is further configured to selectively output one of the plurality of the output video signals that have respectively undergone the grayscale compression processes corresponding to the plurality of signal interfaces.

3. The signal processing device according to claim 1 , wherein the circuitry is further configured to:

process the input video signal and obtain a first output video signal that has undergone a grayscale compression process of a reference signal interface, and

convert the first output video signal into a video signal that has undergone a grayscale compression process of another signal interface other than the reference signal interface, and

perform each process of a grayscale decompression process corresponding to the grayscale compression process of the reference signal interface, a process of adding characteristics of system gamma of the reference signal interface and a process of cancelling out characteristics of system gamma of the other signal interface, and a grayscale compression process of the other signal interface on the first output video signal.

4. The signal processing device according to claim 1 , wherein the circuitry is further configured to obtain the input video signal.

5. A signal processing method comprising:

processing, by circuitry, an input video signal and obtaining an output video signal that has undergone a grayscale compression process,

wherein grayscale compression processes of a plurality of signal interfaces are performed, and a plurality of the output video signals that have respectively undergone the grayscale compression processes corresponding to the plurality of signal interfaces are simultaneously outputted,

wherein the method further includes performing at least a process of adding characteristics of system gamma of a reference signal interface when a grayscale compression process of another signal interface other than the reference signal interface is performed.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 8, 2018
From: KAMIYA, KOJI; KIKUCHI, HIROAKI; ONUKI, JUN; ENDO, TOMOYUKI; HIROSE, MASAKI
To: SONY CORPORATION
Reel/Frame 047451/0264 →
Priority Claims (2)
JP JP2016-126933 · Jun 27, 2016 · national
JP JP2017-123489 · Jun 23, 2017 · national
Continuity (1)
Related Publication 20190141229A1 · May 9, 2019