Solid-state thin film hybrid electrochemical cell
Thin film all-solid-state power sources, including pseudocapacitors having solid inorganic Li + -ion conductive electrolyte, for IoT, microsensors, MEMS, RFID TAGs, medical devices, elements of microfluidic chips Micro Electro Harvesting and ultra-light energy storage. An electrochemical power source includes a substrate; a first current collector layer on the substrate; a first buffer/cache layer on the first current collector layer; a solid-state electrolyte layer on the first buffer/cache layer; a second buffer/cache layer on the solid-state electrolyte layer; a second current collector layer on the second buffer/cache layer. Each buffer/cache layer is formed of Li X M Y O 3 , where M is Nb, Ta, Ti, V, X is 0.8-1.4, and Y is 1.2-0.6. The buffer/cache layer is 15-1000 nm. At least one Faradaic layer is between the first collector layer and the first buffer layer and/or between the second collector layer and the second buffer layer.
1. An electrochemical power source comprising:
a substrate;
a first current collector layer on the substrate;
a first buffer/cache layer on the first current collector layer, wherein the first buffer/cache layer accumulates energy;
a solid-state electrolyte layer on the first buffer/cache layer;
a second buffer/cache layer on the solid-state electrolyte layer, wherein the second buffer/cache layer accumulates energy;
a second current collector layer on the second buffer/cache layer,
wherein each of the buffer/cache layers is formed of Li X M Y O 3 ,
wherein
M is any of Nb, Ta, Ti, V,
X is in a range of 0.8 to 1.4, and
Y is in a range of 1.2 to 0.6.
2. The power source of claim 1 , further comprising an outer protective layer above the second collector layer.
3. The power source of claim 1 , wherein a thickness of each of the buffer/cache layers is in a range of 15 to 1000 nm.
4. The power source of claim 1 , wherein each layer is a thin film.
5. The power source of claim 1 , wherein the solid-state electrolyte layer is an all-solid-state electrolyte layer.
6. The power source of claim 1 , further comprising at least one Faradaic layer between the first current collector layer and the first buffer/cache layer and/or between the second current collector layer and the second buffer/cache layer.
7. The power source of claim 6 , wherein the Faradaic layer is formed of WO 2.4-2.9 :M1:M2:E1:E2:E3,
wherein
M1 is a dopant element selected from Mo, Ti, Ni, V, Cr, Al, Nb, Ta, Co, Mn,
M2 is a dopant element selected from Mo, Ti, Ni, V, Cr, Al, Nb, Ta, Co, Mn,
E1 is a dopant element selected from H, N, C, Si, Ge, P, B,
E2 is a dopant element selected from H, N, C, Si, Ge, P, B,
E3 is a dopant element selected from H, N, C, Si, Ge, P, B, and
M1 differs from M2 and E1, E2, E3 differ from each other.
8. The power source of claim 6 , wherein the Faradaic layer is formed of MoO 2.4-2.9 :M1:M2:E1:E2:E3,
wherein
M1 is a dopant element selected from Ti, Ni, V, Cr, Al, Nb, Ta, Co, Mn,
M2 is a dopant element selected from Ti, Ni, V, Cr, Al, Nb, Ta, Co, Mn,
E1 is a dopant element selected from H, N, C, Si, Ge, P, B,
E2 is a dopant element selected from H, N, C, Si, Ge, P, B,
E3 is a dopant element selected from H, N, C, Si, Ge, P, B, and
M1 differs from M2 and E1, E2, E3 differ from each other.
9. The power source of claim 6 , wherein a thickness of the Faradaic layer is in a range of 100 to 1000 nm.
10. The power source of claim 1 , wherein the first buffer/cache layer and/or the second buffer/cache layer provides protection against overcharging and/or discharging below a cut-off voltage.
11. A method of manufacturing an electrochemical power source, the method comprising:
forming a first current collector layer on a substrate;
forming a first buffer/cache layer on the first current collector layer, wherein the first buffer/cache layer accumulates energy;
forming a solid-state electrolyte layer on the first buffer/cache layer;
forming a second buffer/cache layer on the solid-state electrolyte layer, wherein the second buffer/cache layer accumulates energy;
forming a second current collector layer on the second buffer/cache layer,
wherein each of the two buffer/cache layers is formed of Li X M Y O 3 ,
wherein
M is any of Nb, Ta, Ti, V,
X is in a range of 0.8 to 1.4, and
Y is in a range of 1.2 to 0.6.
12. The method of claim 11 , wherein the first buffer/cache layer and/or the second buffer/cache layer provides protection against overcharging and/or discharging below a cut-off voltage.
13. The method of claim 12 , further including forming an outer protective layer above the second collector layer.
14. The method claim 12 , wherein a thickness of each of the buffer/cache layers is in the range of 15 to 1000 nm.
15. The method of claim 11 , wherein each layer is a thin film.
16. The method of manufacturing an electrochemical power source of claim 11 , wherein the solid-state electrolyte layer is an all-solid-state electrolyte layer.
17. The method of claim 11 , further including forming at least one Faradaic layer between the first current collector layer and the first buffer/cache layer and/or between the second current collector layer and the second buffer/cache layer.
18. The method of claim 17 , wherein the Faradaic layer is formed of WO 2.4-2.9 :M1:M2:E1:E2:E3,
wherein
M1 is a dopant element selected from Mo, Ti, Ni, V, Cr, Al, Nb, Ta, Co, Mn,
M2 is a dopant element selected from Mo, Ti, Ni, V, Cr, Al, Nb, Ta, Co, Mn,
E1 is a dopant element selected from H, N, C, Si, Ge, P, B,
E2 is a dopant element selected from H, N, C, Si, Ge, P, B,
E3 is a dopant element selected from H, N, C, Si, Ge, P, B, and
M1 differs from M2 and E1, E2, E3 differ from each other.
19. The method of claim 17 , wherein the Faradaic layer is formed of MoO 2.4-2.9 :M1:M2:E1:E2:E3,
wherein
M1 is a dopant element selected from Ti, Ni, V, Cr, Al, Nb, Ta, Co, Mn,
M2 is a dopant element selected from Ti, Ni, V, Cr, Al, Nb, Ta, Co, Mn,
E1 is a dopant element selected from H, N, C, Si, Ge, P, B,
E2 is a dopant element selected from H, N, C, Si, Ge, P, B,
E3 is a dopant element selected from H, N, C, Si, Ge, P, B, and
M1 differs from M2 and E1, E2, E3 differ from each other.
20. The method of claim 17 , wherein a thickness of the Faradaic layer is in a range of 100 to 1000 nm.