Agnostic model of semiconductor devices and related methods
The disclosed embodiments include systems and methods of building an agnostic model of a physically-based semiconductor device. The embodiments may include implementing, in the agnostic model, an arbitrary voltage source in series between a node voltage and a zero value voltage source, implementing, in the agnostic model, a reference capacitor in series between the node voltage and a dummy voltage source, implementing, in the agnostic model, an arbitrary current source between a first node and a second node. The arbitrary current source may include the dummy voltage source divided by the reference capacitor, and the arbitrary current source may model the change in the any property, such as charge, over time within the semiconductor device.
1. A method of building an agnostic model of a physically-based semiconductor device for use in a first simulator, comprising:
implementing, in the agnostic model, an arbitrary voltage source in series between a node voltage and a zero value voltage source;
implementing, in the agnostic model, an equation of a physical property of the semiconductor device at the node voltage;
implementing, in the agnostic model, a reference capacitor in series between the node voltage and a dummy voltage source;
implementing, in the agnostic model, an arbitrary current source between a first node and a second node, wherein the arbitrary current source comprises the dummy voltage source divided by the reference capacitor, and wherein the arbitrary current source models the change in the physical property over time regardless of whether the simulator includes a source operator for the change in the physical property over time; and
running the agnostic model in the first simulator.
2. The method of claim 1 , wherein the dummy voltage source comprises a zero value voltage source.
3. The method of claim 1 , wherein implementing the arbitrary current source comprises a current monitored through the dummy voltage source.
4. The method of claim 1 , wherein the dummy voltage comprises a zero value.
5. The method of claim 1 , comprising running the agnostic model as part of a circuit in the first simulator.
6. The method of claim 5 , comprising running the agnostic model in a second simulator comprising a different syntax from the first simulator.
7. The method of claim 5 , wherein the first simulator comprises a SPICE simulator.
8. The method of claim 5 , comprising fabricating the circuit.
9. The method of claim 1 , comprising implementing the agnostic model in a comprehensive circuit.
10. The method of claim 1 , wherein the node voltage comprises an equation representing a charge at a physical location within the semiconductor device.
11. A method of providing an agnostic model for a time based derivative of a property of a semiconductor device for use in a first simulator, comprising:
implementing an equation of the property at a node voltage into an arbitrary voltage source, wherein the node voltage is connected to a reference capacitor;
implementing a current through the reference capacitor as
I
Crefd
=
C
refd
dV
ref
dt
wherein C refd with capacitance value myC ref represents the reference capacitor and V ref represents the voltage across C refd ;
implementing a value into an arbitrary current source as
I
ref
=
I
(
V
dummy
)
myC
ref
where V dummy is a dummy voltage connected in series to the reference capacitor, wherein the arbitrary current source models a change in the property over time regardless of whether the simulator includes a source operator for the change in the property over time; and
running the agnostic model in a first simulator.
12. The method of claim 11 , wherein the arbitrary current source is placed between a first node and a second node within a subcircuit of the agnostic model.
13. The method of claim 11 , comprising running the agnostic model value in a second simulator comprising a different syntax from the first simulator.
14. The method of claim 11 , wherein the property of the semiconductor device comprises an equation representing a charge at a physical location within the semiconductor device.
15. A non-transitory computer-readable medium that stores therein a program causing a processor to execute a process, comprising:
implementing, in an agnostic model for use in a first simulator, an arbitrary voltage source in series between a node voltage and a zero value voltage source;
implementing, in the agnostic model, a reference capacitor in series between the node voltage and a dummy voltage source;
implementing, in the agnostic model, an arbitrary current source between a first node and a second node, wherein the arbitrary current source comprises the dummy voltage source divided by the reference capacitor, and wherein the arbitrary current source models a change in charge over time within the semiconductor device regardless of whether the simulator includes a source operator for the change in charge over time; and
running the agnostic model in a first simulator.
16. The non-transitory computer-readable medium of claim 15 , wherein the process further comprises running the agnostic model in a second simulator comprising a different syntax from the first simulator.