IP Library Granted Patent US 10,862,185
Granted Patent B2
US 10,862,185 · App. 16/107,377 · Granted Dec 8, 2020

Integrated circuit with capacitor in different layer than transmission line

Inventor: Kimberly Dawn Eilert (Mesa, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01P3/08H01L23/528H01L23/5222H01L23/5223H01L23/64H01L23/66H01L27/0805H01L28/60H01P1/203H01P1/20345H01P5/184H05K1/0231H05K1/0236H01L27/016H01L2223/6627
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,862,185
App. No.
16/107,377
Granted
Dec 8, 2020
Kind
B2
Abstract

An integrated circuit can include a first capacitor in a first end portion of the integrated circuit and including a first plate and a second plate, the first plate of the first capacitor being electrically coupled to ground and within a first metal layer of the integrated circuit, a first transmission line electrically coupled to the second plate of the first capacitor, the first transmission line being within a second metal layer of the integrated circuit, a second capacitor in a second end portion of the integrated circuit and including a first plate and a second plate, the first plate of the second capacitor being electrically coupled to ground and within the first metal layer of the integrated circuit, and a second transmission line electrically coupled to the second plate of the second capacitor, the second transmission line being in the second metal layer of the integrated circuit.

Claims (47)

1. An integrated circuit comprising:

a first capacitor disposed in a first end portion of the integrated circuit and including a first plate and a second plate, the first plate of the first capacitor being disposed within a first metal layer of the integrated circuit, the second plate of the first capacitor being disposed within a second metal layer of the integrated circuit;

a first transmission line electrically coupled to the second plate of the first capacitor, the first transmission line being disposed within a third metal layer of the integrated circuit, the second metal layer being disposed between the first metal layer and the third metal layer;

an electrically conductive extension portion extending from the second plate of the first capacitor, the electrically conductive extension portion being narrower than the second plate of the first capacitor and broader than the first transmission line;

a via extending from the electrically conductive extension portion to the first transmission line;

a second capacitor disposed in a second end portion of the integrated circuit and including a first plate and a second plate, the first plate of the second capacitor being disposed within the first metal layer, the second plate of the first capacitor being disposed within the second metal layer; and

a second transmission line electrically coupled to the second plate of the second capacitor, the second transmission line being disposed within the third metal layer of the integrated circuit.

2. The integrated circuit of claim 1 , wherein the first transmission line extends from the first end portion of the integrated circuit to the second end portion of the integrated circuit.

3. The integrated circuit of claim 1 , wherein the first transmission line is electrically coupled to ground.

4. The integrated circuit of claim 1 , wherein the first transmission line is electrically coupled to ground by a via extending from an end portion of the transmission line to the first metal layer of the integrated circuit.

5. The integrated circuit of claim 1 , wherein the first transmission line is parallel to the second transmission line.

6. The integrated circuit of claim 1 , further comprising a feedline coupled to the first transmission line, the feedline propagating electromagnetic waves from the first transmission line to a signal processor.

7. The integrated circuit of claim 1 , wherein the first capacitor has a capacitance of less than six picofarads.

8. The integrated circuit of claim 1 , further comprising an insulator material disposed between the first plate of the first capacitor and the second plate of the first capacitor.

9. The integrated circuit of claim 1 , wherein the second plate of the first capacitor extends into two layers of the integrated circuit, each of the two layers including electrical devices of the integrated circuit.

10. The integrated circuit of claim 1 , wherein the first plate of the first capacitor and the second plate of the first capacitor are parallel to the first transmission line.

11. The integrated circuit of claim 1 , wherein a combination of the first capacitor and the first transmission line passes electromagnetic waves at microwave frequencies.

12. The integrated circuit of claim 1 , wherein a combination of the first capacitor and the first transmission line filters electromagnetic waves outside of microwave frequencies.

13. The integrated circuit of claim 1 , wherein the first metal layer of the integrated circuit comprises a silicon substrate.

14. The integrated circuit of claim 1 , wherein the first plate of the first capacitor is electrically coupled to ground, the ground being closer to the first metal layer than to the second metal layer.

15. The integrated circuit of claim 1 , wherein the electrically conductive extension portion extends from the second plate of the first capacitor in a direction parallel to the first transmission line.

16. A wafer comprising multiple integrated circuits, each of the integrated circuits comprising:

a first capacitor disposed in a first end portion of the integrated circuit and including a first plate and a second plate, the first plate of the first capacitor being electrically coupled to ground and disposed within a first metal layer of the integrated circuit, the second plate of the first capacitor being disposed within a second metal layer of the integrated circuit;

a first transmission line electrically coupled to the second plate of the first capacitor, the first transmission line being disposed within a third metal layer of the integrated circuit, the second metal layer being disposed between the first metal layer and the third metal layer;

an electrically conductive extension portion extending from the second plate of the first capacitor, the electrically conductive extension portion being narrower than the second plate of the first capacitor and broader than the first transmission line;

a via extending from the electrically conductive extension portion to the first transmission line;

a second capacitor disposed in a second end portion of the integrated circuit and including a first plate and a second plate, the first plate of the second capacitor being disposed within the first metal layer, the second plate of the first capacitor being disposed within the second metal layer; and

a second transmission line electrically coupled to the second plate of the second capacitor, the second transmission line being disposed within the third metal layer.

17. An integrated circuit comprising:

a first filter component, the first combline filter component comprising:

a first capacitor disposed in a first end portion of the integrated circuit and including a first plate and a second plate, the first plate of the first capacitor being electrically coupled to ground and disposed within a first layer of the integrated circuit, the second plate of the first capacitor being disposed within a second layer of the integrated circuit;

a first electrically conductive extension portion extending from the second plate of the first capacitor, the first electrically conductive extension portion being narrower than the second plate of the first capacitor;

a first via extending from the first electrically conductive extension portion to a third layer of the integrated circuit, the second layer being disposed between the first layer and the third layer; and

a first transmission line electrically coupled to the first via, the first transmission line being disposed in the third layer, extending to a second end portion of the integrated circuit, and being coupled to ground, the first transmission line being narrower than the first electrically conductive extension portion; and

a second combline filter component, the second combline filter component comprising:

a second capacitor disposed in the second end portion of the integrated circuit and including a first plate and a second plate, the first plate of the second capacitor being disposed within the first layer, the second plate of the first capacitor being disposed within the second layer;

a second electrically conductive extension portion extending from the second plate of the second capacitor, the second electrically conductive extension portion being narrower than the second plate of the second capacitor;

a second via extending from the second electrically conductive extension portion to the third layer; and

a second transmission line electrically coupled to the second via, the second transmission line being disposed in the third layer and extending to the first end portion of the integrated circuit.

18. The integrated circuit of claim 17 , further comprising a third combline filter component, the third combline filter component comprising:

a third capacitor disposed in the first end portion of the integrated circuit and including a first plate and a second plate, the first plate of the third capacitor being electrically coupled to ground and disposed within the first layer of the integrated circuit;

a third electrically conductive extension portion extending from the second plate of the third capacitor;

a third via extending from the third electrically conductive extension portion to the second layer of the integrated circuit; and

a third transmission line electrically coupled to the third via, the third transmission line being disposed in the second layer of the integrated circuit, extending to the second end portion of the integrated circuit, and being coupled to ground,

wherein the second combline filter is disposed between the first combline filter and the third combline filter.

19. The integrated circuit of claim 17 , further comprising a feedline coupled to the first transmission line, the feedline propagating electromagnetic waves from the first transmission line to a signal processor.

20. The integrated circuit of claim 17 , wherein the second plate of the first capacitor extends into two layers of the integrated circuit, each of the two layers including electrical devices of the integrated circuit.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 047399, FRAME 0631 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064078/0001 →
SECURITY INTEREST Recorded Nov 1, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047399/0631 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: EILERT, KIMBERLY DAWN
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 046651/0650 →
Continuity (2)
Provisional Application 62593725 · Dec 1, 2017
Related Publication 20190173148A1 · Jun 6, 2019