Manufacturing method of semiconductor device and semiconductor device thereof
View Patent ↗A semiconductor device structure and a method for manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a method for manufacturing a semiconductor device that comprises ordering and performing processing steps in a manner that prevents warpage deformation from occurring to a wafer and/or die due to mismatching thermal coefficients.
1. A method of manufacturing a semiconductor device, the method comprising:
providing an interposer structure comprising a base material and an interposer directly on the base material, the interposer comprising a first interposer side facing the base material, a second interposer side opposite the first interposer side, and lateral interposer sides extending between the first interposer side and the second interposer side, the interposer comprising an interposer conductive layer and an interposer dielectric layer;
forming a stiffener on the second interposer side, the stiffener comprising a first stiffener side coupled to the second interposer side without an intervening layer of adhesive between the first stiffener side and the second interposer side, a second stiffener side opposite the first stiffener side, and lateral stiffener sides between the first stiffener side and the second stiffener side;
removing the base material from the first interposer side;
coupling a semiconductor die to the interposer, the semiconductor die comprising a first die side, a second die side opposite the first die side and coupled to the first interposer side, and lateral die sides extending between the first die side and the second die side; and
encapsulating at least the first interposer side and the lateral die sides with an encapsulating material, the encapsulating material comprising a first encapsulating material side, a second encapsulating material side opposite the first encapsulating material side and coupled to the first interposer side, and lateral encapsulating material sides extending between the first encapsulating material side and the second encapsulating material side.
2. The method of claim 1 , wherein the stiffener comprises a metal layer comprising a plurality of first pad portions and a second portion, and said forming the stiffener comprises:
forming the first pad portions on and electrically coupled to the interposer conductive layer; and
forming the second portion on the interposer dielectric layer and electrically isolated from the first pad portions.
3. The method of claim 2 , wherein the second portion of the metal layer is electrically isolated from the interposer conductive layer.
4. The method of claim 2 , comprising forming a plurality of electrical contact structures for coupling the semiconductor device to another device, said forming the plurality of electrical contact structures comprising forming the plurality of electrical contact structures such that:
each of the plurality of electrical contact structures is coupled to a respective one of the first pad portions of the metal layer; and
no electrical contact structures for coupling the semiconductor device to another device are coupled to the second portion of the metal layer.
5. The method of claim 1 , wherein the stiffener comprises only a single layer of metal.
6. The method of claim 1 , wherein said forming the stiffener comprises forming a first metal layer of a first metal, and forming a second metal layer of a second metal different from the first metal.
7. The method of claim 1 , wherein each of the lateral interposer sides is coplanar with a respective one of the lateral stiffener sides and a respective one of the lateral encapsulating material sides.
8. A semiconductor device comprising:
an interposer comprising a top interposer side, a bottom interposer side, and lateral interposer sides extending between the top interposer side and the bottom interposer side, the interposer comprising an interposer conductive layer and an interposer dielectric layer;
a semiconductor die coupled to the interposer, the semiconductor die comprising a top die side, a bottom die side coupled to the top interposer side, and lateral die sides extending between the top die side and the bottom die side;
an encapsulating material encapsulating at least the top interposer side and the lateral die sides, the encapsulating material comprising a top encapsulating material side, a bottom encapsulating material side coupled to the top interposer side, and lateral encapsulating material sides extending between the top encapsulating material side and the bottom encapsulating material side; and
a stiffener comprising a top stiffener side coupled to the bottom interposer side without an intervening layer of adhesive between the top stiffener side and the bottom interposer side, a bottom stiffener side, and lateral stiffener sides extending between the top stiffener side and the bottom stiffener side, wherein:
the stiffener comprises a metal layer comprising a plurality of first pad portions and a second portion;
the first pad portions of the metal layer are on and electrically coupled to the interposer conductive layer; and
the second portion of the metal layer is on the interposer dielectric layer and electrically isolated from the first pad portions.
9. The semiconductor device of claim 8 , wherein the first metal layer is a layer of a first metal, and the stiffener further comprises a second metal layer of a second metal different from the first metal.
10. The semiconductor device of claim 8 , wherein the second portion of the metal layer is electrically isolated from the interposer conductive layer.
11. The semiconductor device of claim 8 , comprising a plurality of electrical contact structures for coupling the semiconductor device to another device, wherein:
each of the plurality of electrical contact structures is coupled to a respective one of the first pad portions of the metal layer; and
no electrical contact structures for coupling the semiconductor device to another device are coupled to the second portion of the metal layer.
12. The semiconductor device of claim 8 , wherein the metal layer of the stiffener is the only metal layer of the stiffener.
13. A semiconductor device comprising:
an interposer comprising a top interposer side, a bottom interposer side, and lateral interposer sides extending between the top interposer side and the bottom interposer side, the interposer comprising an interposer conductive layer and an interposer dielectric layer;
a semiconductor die coupled to the interposer, the semiconductor die comprising a top die side, a bottom die side coupled to the top interposer side, and lateral die sides extending between the top die side and the bottom die side;
an encapsulating material encapsulating at least the top interposer side and the lateral die sides, the encapsulating material comprising a top encapsulating material side, a bottom encapsulating material side coupled to the top interposer side, and lateral encapsulating material sides extending between the top encapsulating material side and the bottom encapsulating material side; and
a stiffener comprising a top stiffener side coupled to the bottom interposer side without an intervening layer of adhesive between the top stiffener side and the bottom interposer side, a bottom stiffener side, and lateral stiffener sides extending between the top stiffener side and the bottom stiffener side,
wherein the stiffener comprises a first metal layer of a first metal, and a second metal layer of a second metal different from the first metal.
14. The semiconductor device of claim 8 , wherein each of the lateral interposer sides is coplanar with a respective one of the lateral stiffener sides and a respective one of the lateral encapsulating material sides.
15. A semiconductor device comprising:
an interposer having a top interposer side, a bottom interposer side, and lateral interposer sides extending between the top interposer side and the bottom interposer side;
a semiconductor die coupled to the interposer, the semiconductor die comprising a top die side, a bottom die side coupled to the top interposer side, and lateral die sides extending between the top die side and the bottom die side;
an encapsulating material encapsulating at least the top interposer side and the lateral die sides, the encapsulating material having a top encapsulating material side, a bottom encapsulating material side coupled to the top interposer side, and lateral encapsulating material sides extending between the top encapsulating material side and the bottom encapsulating material side; and
a stiffener comprising a top stiffener side, a bottom stiffener side directly on at least the top encapsulating material side without an intervening layer of adhesive between the bottom stiffener side and the top encapsulating material side, and lateral stiffener sides extending between the top stiffener side and the bottom stiffener side,
wherein the stiffer comprises a metal layer.
16. The semiconductor device of claim 15 , wherein the stiffener comprises only the metal layer.
17. The semiconductor device of claim 15 , wherein the metal layer comprises a copper layer.
18. The semiconductor device of claim 15 , wherein the metal layer comprises a nickel layer.
19. The semiconductor device of claim 15 , wherein each of the lateral stiffener sides is coplanar with a respective one of the lateral encapsulating material sides and a respective one of the lateral interposer sides.
20. The semiconductor device of claim 15 , wherein the bottom stiffener side is directly on the top die side without an intervening layer of adhesive between the bottom stiffener side and the top die side.