IP Library › Granted Patent US 10,804,285
Granted Patent B2
US 10,804,285 · App. 16/109,386 · Granted Oct 13, 2020

Semiconductor device

Inventor: Ken Komiya (Nagoya Aichi, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L27/11582H01L23/528H01L27/1157H01L27/11519H01L27/11556H01L27/11565H01L29/1037H01L21/0217H01L21/02164H01L21/02532H01L21/02592H01L21/02667H01L21/31111H01L21/31116H01L21/31144H01L23/5329H01L23/53257H01L29/40114H01L29/40117H01L29/513H01L29/517H01L29/7883H01L29/7889H01L29/7926
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Quick Facts
Patent No.
US 10,804,285
App. No.
16/109,386
Granted
Oct 13, 2020
Kind
B2
Abstract

A semiconductor device includes a first stacked body comprising first conductive layers and first insulating layers interposed therebetween, a first columnar portion comprising a first semiconductor layer extending in the first stacked body in the first direction and a first memory layer between the first semiconductor layer and the first conductive layers, a second stacked body comprising second conductive layers and second insulating layers interposed therebetween, and a second columnar portion comprising a second semiconductor layer extending in the second stacked body in the first direction and a second memory layer between the second semiconductor layer and the second conductive layers. The first columnar portion has a first diameter, and the second columnar portion has a second diameter, and each of the plurality of first conductive layers has a first film thickness, and each of the plurality of second conductive layers has a second film thickness.

Claims (62)

1. A semiconductor device comprising:

an under layer;

a first stacked body located over the under layer, comprising a plurality of first conductive layers stacked one over the other in a first direction away from the under layer with first insulating layers interposed therebetween;

a first columnar portion comprising a first semiconductor layer extending in the first stacked body in the first direction, and a first memory layer located between the first semiconductor layer and the plurality of first conductive layers;

a second stacked body located over the first stacked body, comprising a plurality of second conductive layers stacked one over the other in the first direction with second insulating layers interposed therebetween;

a second columnar portion comprising a second semiconductor layer extending in the second stacked body in the first direction, and a second memory layer located between the second semiconductor layer and the plurality of second conductive layers;

an intermediate layer provided between the first stacked body and the second stacked body; and

a joining portion located between the first columnar portion and the second columnar portion within the intermediate layer, and including a third semiconductor layer continuous from the first semiconductor layer to the second semiconductor layer, wherein

the first columnar portion has a first diameter, and the second columnar portion has a second diameter different from the first diameter,

each of the plurality of first conductive layers has a first film thickness, and each of the plurality of second conductive layers has a second film thickness different from the first film thickness, and

the joining portion has a third diameter larger than the first diameter and the second diameter.

2. The semiconductor device according to claim 1 , wherein the first diameter is smaller than the second diameter, and the first film thickness is smaller than the second film thickness.

3. The semiconductor device according to claim 1 , wherein the first diameter is larger than the second diameter, and the first film thickness is larger than the second film thickness.

4. The semiconductor device according to claim 1 , wherein

the sidewall of each of the first columnar portion and the second columnar portion has a bow shape,

the first diameter is the diameter of the uppermost layer of the first columnar portion, and

the second diameter is the diameter of the uppermost layer of the second columnar portion.

5. The semiconductor device according to claim 1 , wherein

the sidewall of each of the first columnar portion and the second columnar portion has a bow shape,

the first diameter is the diameter of the lowermost layer of the first columnar portion, and

the second diameter is the diameter of the lowermost layer of the second columnar portion.

6. The semiconductor device according to claim 1 , wherein

the sidewall of each of the first columnar portion and the second columnar portion has a bow shape,

the first diameter is a diameter between the uppermost layer and the lowermost layer of the first columnar portion, and

the second diameter is a diameter between the uppermost layer and the lowermost layer of the second columnar portion.

7. The semiconductor device according to claim 6 , wherein

the first diameter is the largest diameter of the first columnar portion, and

the second diameter is the largest diameter of the second columnar portion.

8. The semiconductor device according to claim 1 , wherein the intermediate layer has a third film thickness larger than the sum of the first film thickness and the second film thickness.

9. The semiconductor device according to claim 1 , wherein the intermediate layer is an insulating layer.

10. The semiconductor device according to claim 1 , wherein the joining portion includes a layer extending continuously from the first memory layer to the second memory layer.

11. The semiconductor device according to claim 1 , wherein the first insulating layers, the second insulating layers, and the intermediate layer comprise the same material.

12. A semiconductor device comprising:

an under layer;

a first stacked body located over the under layer, comprising a plurality of first conductive layers stacked one over the other in a first direction away from the under layer with first insulating layers interposed therebetween;

a first columnar portion comprising a first semiconductor layer extending in the first stacked body in the first direction, and a first memory layer located between the first semiconductor layer and the plurality of first conductive layers;

a second stacked body located over the first stacked body, comprising a plurality of second conductive layers stacked one over the other in the first direction with second insulating layers interposed therebetween;

a second columnar portion comprising a second semiconductor layer extending in the second stacked body in the first direction, and a second memory layer located between the second semiconductor layer and the plurality of second conductive layers;

an intermediate layer provided between the first stacked body and the second stacked body; and

a joining portion located between the first columnar portion and the second columnar portion within the intermediate layer, and including a third semiconductor layer continuous from the first semiconductor layer to the second semiconductor layer, wherein

the first columnar portion has a first diameter, and the second columnar portion has a second diameter different from the first diameter,

each of the plurality of first conductive layers has a first film thickness, and each of the plurality of second conductive layers has a second film thickness different from the first film thickness, and

the intermediate layer has a third film thickness larger than the sum of the first film thickness and the second film thickness.

13. The semiconductor device according to claim 12 , wherein the first diameter is smaller than the second diameter, and the first film thickness is smaller than the second film thickness.

14. The semiconductor device according to claim 12 , wherein the first diameter is larger than the second diameter, and the first film thickness is larger than the second film thickness.

15. The semiconductor device according to claim 12 , wherein

the sidewall of each of the first columnar portion and the second columnar portion has a bow shape,

the first diameter is the diameter of the uppermost layer of the first columnar portion, and

the second diameter is the diameter of the uppermost layer of the second columnar portion.

16. The semiconductor device according to claim 12 , wherein

the sidewall of each of the first columnar portion and the second columnar portion has a bow shape,

the first diameter is the diameter of the lowermost layer of the first columnar portion, and

the second diameter is the diameter of the lowermost layer of the second columnar portion.

17. The semiconductor device according to claim 12 , wherein

the sidewall of each of the first columnar portion and the second columnar portion has a bow shape,

the first diameter is a diameter between the uppermost layer and the lowermost layer of the first columnar portion, and

the second diameter is a diameter between the uppermost layer and the lowermost layer of the second columnar portion.

18. The semiconductor device according to claim 17 , wherein

the first diameter is the largest diameter of the first columnar portion, and

the second diameter is the largest diameter of the second columnar portion.

19. The semiconductor device according to claim 12 , wherein the intermediate layer is an insulating layer.

20. The semiconductor device according to claim 12 , wherein the joining portion includes a layer extending continuously from the first memory layer to the second memory layer.

Assignments (4)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 29, 2018
From: KOMIYA, KEN
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 047337/0096 →
Priority Claims (1)
JP 2017-249191 · Dec 26, 2017 · national
Continuity (1)
Related Publication 20190198521A1 · Jun 27, 2019
Cited By (1)
US 12,501,615