Memory devices configured to provide external regulated voltages

1. A memory device, comprising:

one or more external inputs configured to receive a supply voltage having a first voltage level;

a voltage regulator configured to receive the supply voltage from the one or more external inputs and to output an output voltage having a second voltage level different from the first voltage level, wherein the voltage regulator comprises a power management integrated circuit (PMIC) that includes one or more registers configured to store information corresponding to the output voltage, wherein the output voltage comprises a plurality of output voltages, and wherein the information comprises a corresponding voltage level for each of the plurality of output voltages, a tolerance corresponding to each of the plurality of output voltages, a first order in which the plurality of output voltages are powered up, first delays corresponding to the first order, a second order in which the plurality of output voltages are powered down, and second delays corresponding to the second order;

one or more memories configured to receive the output voltage from the voltage regulator; and

one or more external outputs configured to receive the output voltage from the voltage regulator and to supply the output voltage to one or more connected devices.

2. The memory device of claim 1 ,

wherein the supply voltage is a first supply voltage,

wherein the one or more external inputs are a first one or more external inputs,

further comprising a second one or more external inputs configured to receive a second supply voltage having a third voltage level different from the first voltage level, and

wherein the voltage regulator is further configured to receive the second supply voltage from the second one or more external inputs.

3. The memory device of claim 1 ,

wherein the output voltage comprises a first output voltage and a second output voltage,

wherein the one or more memories are configured to receive the second output voltage from the voltage regulator, and

wherein the one or more external outputs are configured to receive the first output voltage from the voltage regulator and to supply the first output voltage to the one or more connected devices.

4. The memory device of claim 3 ,

wherein the one or more external outputs are a first one or more external outputs,

wherein the one or more connected devices comprise a first one or more connected devices,

further comprising a second one or more external outputs, and

wherein the second one or more external outputs are configured to receive the second output voltage from the voltage regulator and to supply the second output voltage to second one or more connected devices.

5. The memory device of claim 1 ,

wherein the voltage regulator comprises a first voltage regulator and a second voltage regulator,

wherein the output voltage comprises a first output voltage and a second output voltage,

wherein the one or more memories are configured to receive the first output voltage from the voltage regulator, and

wherein the one or more external outputs are configured to receive the second output voltage from the voltage regulator and to supply the second output voltage to the one or more connected devices.

6. The memory device of claim 1 , wherein the information comprises the second voltage level, a tolerance corresponding to the second voltage level, or a combination thereof.

7. The memory device of claim 1 , wherein the PMIC is configured to output the information in response to receiving a command from a connected host device.

8. The memory device of claim 1 , wherein the PMIC is configured to modify the information in response to receiving a command from a connected host device.

9. The memory device of claim 1 , wherein the memory device is a memory module, and wherein the one or more external inputs and the one or more external outputs are comprised by an edge connector of the memory module.

10. The memory device of claim 9 , wherein the memory module is a dual in-line memory module (DIMM).

11. The memory device of claim 1 ,

wherein the output voltage comprises a first output voltage and a second output voltage,

wherein the one or more memories comprise one or more volatile memories and one or more non-volatile memories,

wherein the one or more volatile memories are configured to receive the first output voltage from the voltage regulator, and

wherein the one or more non-volatile memories are configured to receive the second output voltage from the voltage regulator.

12. A method for operating a memory device, comprising:

providing a supply voltage having a first voltage level to the memory device;

generating from the supply voltage, with a voltage regulator of the memory device, and output voltage having a second voltage level different than the first voltage level; and

providing the output voltage to a device external to the memory device,

wherein the output voltage comprises a first output voltage and a second output voltage,

wherein the device external to the memory device comprises a first external device and a second external device, and

wherein providing the output voltage to the device external to the memory device comprises providing the first output voltage to the first external device and providing the second output voltage to the second external device.

13. The method of claim 12 , wherein the device external to the memory device is a non-memory device.

14. The method of claim 12 , wherein the device external to the memory device is a memory device not including a voltage regulator.

15. The method of claim 12 , further comprising providing the output voltage to one or more memories of the memory device.

16. The method of claim 12 ,

wherein the output voltage further comprises a third output voltage,

further comprising providing the third output voltage to one or more memories of the memory device.