Boost converter short circuit protection

1. A circuit, comprising:

a power transistor having a first drain, a first source, and a first gate;

a negative (N) channel metal oxide semiconductor field effect transistor (MOSFET) having a second drain, a second source, and a second gate, the second drain coupled to the first source; and

a positive (P) channel MOSFET having a third source, a third drain, and a third gate, the third source coupled to the first source and the third drain coupled to the second gate.

2. The circuit of claim 1 , further comprising a diode coupled between the third drain and the second gate.

3. The circuit of claim 2 , wherein the third gate is coupled to a voltage input terminal.

4. The circuit of claim 3 , further comprising an inductor having a first inductor terminal and a second inductor terminal, the first inductor terminal coupled to the first source and the second inductor terminal coupled to the voltage input terminal.

5. The circuit of claim 1 , wherein the N channel MOSFET is a first N channel MOSFET, and the circuit further comprises a second N channel MOSFET having a fourth source, a fourth drain, and a fourth gate, the fourth drain coupled to a charge pump and the fourth source coupled to the second gate.

6. The circuit of claim 5 , wherein the P channel MOSFET is a first P channel MOSFET, the circuit further comprising a second P channel MOSFET having a fifth source, a fifth drain, and a fifth gate, the fifth source coupled to the second gate and the fifth drain coupled to a voltage input terminal.

7. The circuit of claim 6 , further comprising a controller, the controller comprising:

pulse generation circuitry coupled to the first gate;

short circuit detection circuit coupled to:

the pulse generation circuitry;

a voltage output terminal;

the fourth gate; and

the fifth gate.

8. The circuit of claim 1 , further comprising a diode coupled between the first source and the second drain.

9. The circuit of claim 1 , wherein the first drain is coupled to a ground terminal and the second source is coupled to a voltage output terminal.

10. A circuit, comprising:

a power transistor configured to draw current through an inductor; and

short circuit protection circuitry configured to control current through the inductor responsive to detecting a short circuit at a voltage output terminal, the short circuit protection circuitry comprising:

a negative (N) channel metal oxide semiconductor field effect transistor (MOSFET) coupled to of the power transistor and to the voltage output terminal, the N channel MOSFET configured to switch current from the inductor to the voltage output terminal; and

a control transistor coupled to the N channel MOSFET, the control transistor configured to route current from the inductor to the N channel MOSFET.

11. The circuit of claim 10 , wherein the control transistor is configured to activate the N channel MOSFET, responsive to of detecting the short circuit, until a voltage across the inductor is substantially equal to zero.

12. The circuit of claim 10 , further comprising a voltage input terminal coupled to a control terminal of the control transistor; wherein the voltage input terminal is adapted to be coupled to the inductor.

13. The circuit of claim 10 , further comprising a pull-up/pull-down circuit configured to control the N channel MOSFET, the pull-up/pull-down circuit having an output coupled to a control terminal of the N channel MOSFET.

14. The circuit of claim 13 , further comprising a controller configured to:

detect the short circuit at the voltage output terminal of the circuit; and

turn off the power transistor responsive to detecting the short circuit.

15. The circuit of claim 14 , wherein the pull-up/pull-down circuit comprises:

a high-side transistor; and

a low-side transistor;

wherein the controller is configured to:

turn on the low-side transistor responsive to detecting the short circuit at the voltage output terminal; and

turn on the high-side transistor responsive to detecting a lack of short circuit at the voltage output terminal.

16. A circuit comprising:

a first negative (N) channel metal oxide semiconductor field effect transistor (MOSFET) having a first drain, a first source, and a first gate;

a positive (P) channel MOSFET having a second drain, a second source, and a second gate, the second drain coupled to the first gate; and

a second N channel MOSFET having a third drain, a third source, and a third gate, the third source coupled to the first gate.

17. The circuit of claim 16 , wherein the P channel MOSFET is a first P channel MOSFET, the circuit further comprising a second P channel MOSFET having a fourth drain, a fourth source, and a fourth gate, the fourth source coupled to the first gate and the fourth gate coupled to the third gate.

18. The circuit of claim 16 , further comprising a diode coupled between the second drain and the first gate.

19. The circuit of claim 16 , further comprising a charge pump coupled to the third drain.