IP Library Granted Patent US 10,186,984
Granted Patent B1
US 10,186,984 · App. 16/112,088 · Granted Jan 22, 2019

Inverter control device

Inventors: Seung-Cheol Choi (Anyang-si, KR); Hak-Jun Lee (Anyang-si, KR)
Assignee: LSIS CO., LTD.
H02M7/48H02M1/12H02P21/0003H02P21/14H02P21/22H02P27/08
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Quick Facts
Patent No.
US 10,186,984
App. No.
16/112,088
Granted
Jan 22, 2019
Kind
B1
Abstract

An inverter control device is disclosed. The device is configured: for determining a fundamental-wave magnitude of a phase-voltage corresponding to a modified voltage; for performing a proportional-integral (PI) operation of an error between the fundamental-wave magnitude of the phase-voltage and a magnitude of a reference voltage, and for outputting a compensation voltage; configured for adding the compensation voltage to the reference voltage to obtain an output; and for over-modulating the output and for outputting the over-modulated output as the modified voltage.

Claims (19)

1. An inverter control device configured for modifying a vector-based reference voltage into a vector-based modified voltage and for supplying the vector-based modified voltage to an inverter unit including a plurality of switching elements, wherein the inverter control device comprises:

a determination unit configured for determining a fundamental-wave magnitude of a phase-voltage corresponding to the modified voltage;

a proportional-integral control unit configured for performing a proportional-integral operation of an error between the fundamental-wave magnitude of the phase-voltage and a magnitude of the reference voltage, and for outputting a compensation voltage;

a first adder configured for adding the compensation voltage to the reference voltage; and

an over-modulation unit configured for over-modulating an output of the first adder and for outputting the over-modulated output as the modified voltage.

2. The inverter control device of claim 1 , wherein the determination unit includes:

a phase-voltage determination unit for determining each phase-voltage of a vector-based 3-phases voltage from the modified voltage;

a magnitude determination unit for determining a magnitude of each phase-voltage; and

a filter for removing a harmonic component from the magnitude of the phase-voltage and for outputting the phase-voltage having a fundamental-wave magnitude.

3. The inverter control device of claim 2 , wherein the filter includes a band-stop filter, wherein a center frequency of the band-stop filter is a sixth harmonic of the phase-voltage vector.

4. The inverter control device of claim 2 , wherein the filter includes a low-pass filter, wherein a cut-off frequency of the low-pass filter is selected as a frequency lower than a sixth harmonic of the phase-voltage vector.

5. The inverter control device of claim 1 , wherein the over-modulation unit is configured to maintain a larger one of both valid vector application times for vector-based input while to modify a smaller one of the both valid vector application times according to a sampling period, such that the modified voltage is positioned on an output voltage limiting line.

6. The inverter control device of claim 1 , wherein the over-modulation unit includes:

a maximum-value determination unit for determining a maximum-value of a magnitude among three-phases voltages of the 3-phase reference voltage;

a middle-value determination unit for determining a middle-value of a magnitude among three-phases voltages of the 3-phase reference voltage;

a minimum-value determination unit for determining a minimum-value of a magnitude among three-phases voltages of the 3-phase reference voltage;

an offset determination unit for determining offsets using the maximum-value, the middle-value, and the minimum-value, and a direct-current stage voltage of the inverter; and

a second adder for adding the offsets to three-phases voltages of the 3-phase reference voltage respectively.

7. The inverter control device of claim 6 , wherein the over-modulation unit further includes a limiting unit for limiting an output of the second adder to a predetermined range.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2018
From: CHOI, SEUNG-CHEOL; LEE, HAK-JUN
To: LSIS CO., LTD.
Reel/Frame 047207/0130 →
Priority Claims (1)
KR 10-2018-0014460 · Feb 6, 2018 · national
Cited By (1)
US 12,491,774