IP Library Granted Patent US 10,685,918
Granted Patent B2
US 10,685,918 · App. 16/114,674 · Granted Jun 16, 2020

Process variation as die level traceability

Inventors: Jan Lucie Axel Lettens (Zwijnaarde, BE); Wim Dobbelaere (Ninove, BE); Bart Arthur Norbert De Leersnyder (Merelbeke, BE); Thomas Van Vossel (Laarne, BE)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L23/544H01L22/14H01L27/0814H01L29/66106H01L29/866H01L2223/5444H01L2223/5448
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Quick Facts
Patent No.
US 10,685,918
App. No.
16/114,674
Granted
Jun 16, 2020
Kind
B2
Abstract

Devices, systems and methods for uniquely identifying integrated circuits are provided. For at least one embodiment, a method for marking a given integrated circuit out of a plurality of integrated circuits, includes the operations of fabricating a plurality of identifier devices onto each integrated circuit of the plurality of integrated circuits; testing each of the plurality of identifier devices to obtain a test result for each identifier device; associating together each test result obtained for each identifier device fabricated onto each given integrated circuit to form an analog identifier for the given integrated circuit; and storing in a database each analog identifier for each of the plurality of integrated circuits. For at least one embodiment, a method for identifying an integrated circuit previously marked in an accordance with the present disclosure is provided. Articles of commerce marked using an embodiment of the present disclosure are also described.

Claims (47)

1. A method for marking a given integrated circuit out of a plurality of integrated circuits, comprising:

fabricating a plurality of identifier devices onto each integrated circuit of the plurality of integrated circuits;

testing each of the plurality of identifier devices to obtain a test result for each identifier device;

associating together each test result obtained for each identifier device fabricated onto each given integrated circuit to form an analog identifier for the given integrated circuit; and

storing in a database each analog identifier for each of the plurality of integrated circuits.

2. The method of claim 1 ,

wherein the plurality of identifier devices includes Zener diodes.

3. The method of claim 2 ,

wherein the testing of each of the plurality of identifier devices comprises: determining the reverse breakdown voltage for each of the Zener diodes.

4. The method of claim 1 ,

wherein the plurality of identifier devices includes at least ten Zener diodes.

5. The method of claim 1 , further comprising:

determining the plurality of identifier devices needed to uniquely identify each integrated circuit of the plurality of integrated circuits from each of a remainder of the plurality of integrated circuits.

6. The method of claim 1 ,

wherein each analog identifier formed for each of the plurality of integrated circuits uniquely corresponds to a single given integrated circuit of the plurality of integrated circuits.

7. The method of claim 1 , further comprising:

associating at least one integrated circuit of the plurality of integrated circuits with an article of commerce.

8. The method of claim 1 ,

wherein at least one characteristic of each of the plurality of identifier devices monotonically varies over at least one of time and temperature.

9. A method for identifying a subject integrated circuit from a plurality of integrated circuits, comprising:

receiving a subject integrated circuit;

wherein the subject integrated circuit is one of a plurality of integrated circuits manufactured in a given lot of integrated circuits;

wherein the subject integrated circuit includes a plurality of identifier devices;

testing each of the plurality of identifier devices to obtain a resulting plurality of test results;

associating the resulting plurality of test results to form a subject integrated circuit analog identifier;

accessing a database containing a plurality of analog identifiers;

wherein each analog identifier in the plurality of analog identifiers corresponds to a single given integrated circuit fabricated as one of the plurality of integrated circuits in the given lot of integrated circuits;

comparing the subject integrated circuit analog identifier with the plurality of analog identifiers; and

identifying, based on a correlation of the subject integrated circuit analog identifier with one of the plurality of analog identifiers, the subject integrated circuit as a single one of the plurality integrated circuits in the given lot of integrated circuits.

10. The method of claim 9 ,

wherein the subject integrated circuit has been previously marked per the process of claim 1 .

11. The method of claim 9 ,

wherein each of the plurality of identifier devices is a Zener diode.

12. The method of claim 11 ,

wherein the operation of testing each of the plurality of identifier devices comprises:

determining the reverse breakdown voltage for each of the Zener diodes.

13. The method of claim 12 ,

wherein the operation of comparing the subject integrated circuit analog identifier with the plurality of analog identifiers comprises:

determining a correlation coefficient between the subject integrated circuit analog identifiers and each of the plurality of analog identifiers.

14. The method of claim 13 ,

wherein the correlation is a Pearson correlation.

15. The method of claim 13 ,

wherein the identifying occurs when the correlation coefficient of the subject integrated circuit analog identifier compared to a given one of the plurality of analog identifiers is substantially 1.0.

16. The method of claim 13 ,

wherein the identifying occurs when the correlation coefficient of the subject integrated circuit analog identifier compared to a given one of the plurality of analog identifiers is between 0.9 and 1.0.

17. The method of claim 9 ,

wherein at least one characteristic of each of the plurality of identifier devices monotonically varies over at least one of time and temperature.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 047399, FRAME 0631 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064078/0001 →
SECURITY INTEREST Recorded Nov 1, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047399/0631 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2018
From: LETTENS, JAN LUCIE AXEL; DE LEERSNYDER, BART ARTHUR NORBERT; VAN VOSSEL, THOMAS; DOBBELAERE, WIM
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 046726/0032 →