IP Library Granted Patent US 11,404,639
Granted Patent B2
US 11,404,639 · App. 16/114,713 · Granted Aug 2, 2022

Selector devices with integrated barrier materials

Inventors: Elijah V. Karpov (Portland, OR); Brian S. Doyle (Portland, OR); Prashant Majhi (San Jose, CA); Abhishek A. Sharma (Hillsboro, OR); Ravi Pillarisetty (Portland, OR)
Assignee: Intel Corporation
H01L45/1246H01L27/2481H01L45/06H01L45/08H01L45/10H01L45/1233
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Quick Facts
Patent No.
US 11,404,639
App. No.
16/114,713
Granted
Aug 2, 2022
Kind
B2
Abstract

Disclosed herein are selector devices and related devices and techniques. For example, in some embodiments, a selector device may include a first electrode, a second electrode, and a selector material stack between the first electrode and the second electrode. The selector material stack may include a dielectric material layer between a first conductive material layer and a second conductive material layer. A first material layer may be present between the first electrode and the first conductive material layer, and a second material layer may be present between the first conductive material layer and the dielectric layer. The first material layer and the second material layer may be diffusion barriers, and the second material layer may be a weaker diffusion barrier than the first material layer.

Claims (49)

1. A selector device, comprising:

a first electrode;

a second electrode; and

a selector material stack between the first electrode and the second electrode, wherein the selector material stack includes a dielectric material layer between a first conductive material layer and a second conductive material layer, the first conductive material layer is between the first electrode and the dielectric material layer, and the second conductive material layer is between the dielectric material layer and the second electrode;

wherein the selector material stack further includes a first material layer between the first electrode and the first conductive material layer, the selector material stack further includes a second material layer between the first conductive material layer and the dielectric material layer, the first material layer has a different material composition from the first electrode and from the first conductive material layer, and the second material layer has a different material composition from the first conductive material layer and from the dielectric material layer.

2. The selector device of claim 1 , wherein the first material layer and the second material layer are diffusion barriers, and the second material layer is a weaker diffusion barrier than the first material layer.

3. The selector device of claim 1 , wherein the first material layer includes oxygen.

4. The selector device of claim 3 , wherein the first material layer further includes indium, ruthenium, tungsten, or molybdenum.

5. The selector device of claim 1 , wherein the first material layer includes nitrogen.

6. The selector device of claim 5 , wherein the first material layer further includes titanium, tantalum, or tungsten.

7. The selector device of claim 1 , wherein the first material layer includes carbon.

8. The selector device of claim 7 , wherein the first material layer further includes titanium, tantalum, tungsten, or a refractory metal.

9. The selector device of claim 7 , wherein the first material layer further includes nitrogen.

10. The selector device of claim 1 , wherein the first material layer includes tantalum.

11. The selector device of claim 1 , wherein a solubility of material of the first conductive material layer in material of the second material layer is between 1% and 30%.

12. The selector device of claim 1 , wherein the second material layer has a columnar microstructure.

13. The selector device of claim 1 , wherein the dielectric material layer includes a chalcogenide.

14. The selector device of claim 1 , wherein the selector material stack further includes:

a third material layer between the dielectric material layer and the second conductive material layer, and

a fourth material layer between the second conductive material layer and the second electrode,

wherein the third material layer has a different material composition from the dielectric material layer and from the second conductive material layer, and

wherein the fourth material layer has a different material composition from the second conductive material layer and from the second electrode.

15. The selector device of claim 1 , further comprising:

a dielectric barrier at a side surface of the selector device.

16. The selector device of claim 15 , wherein the dielectric barrier includes silicon and nitrogen.

17. The selector device of claim 15 , wherein the dielectric barrier includes aluminum and oxygen.

18. The selector device of claim 15 , wherein the dielectric barrier has a thickness between 10 nanometers and 100 nanometers.

19. A computing device, comprising:

a circuit board;

a processing device coupled to the circuit board; and

a memory array coupled to the processing device, the memory array comprising a memory cell having a storage element coupled in series with a selector device,

wherein the selector device includes:

a first electrode,

a second electrode, and

a selector material stack between the first electrode and the second electrode, wherein the selector material stack includes a dielectric material layer between a first conductive material layer and a second conductive material layer, the first conductive material layer is between the first electrode and the dielectric material layer, and the second conductive material layer is between the dielectric material layer and the second electrode,

wherein the selector material stack further includes a first material layer between the first electrode and the first conductive material layer, the selector material stack further includes a second material layer between the first conductive material layer and the dielectric material layer, the first material layer has a different material composition from the first electrode and from the first conductive material layer, and the second material layer has a different material composition from the first conductive material layer and from the dielectric material layer.

20. The computing device of claim 19 , further comprising:

a wireless communications device coupled to the circuit board.

21. The computing device of claim 19 , wherein the storage element includes a resistive switch.

22. The computing device of claim 19 , wherein the storage element includes a resistive random access memory (RRAM) device, a phase change memory (PCM) device, a metal filament memory device, or a magnetoresistive random access memory (MRAM) device.

23. A method of manufacturing an integrated circuit (IC) component, the method comprising:

forming a selector device, including:

forming a first electrode;

forming a second electrode; and

forming a selector material stack between the first electrode and the second electrode, wherein the selector material stack includes a dielectric material layer between a first conductive material layer and a second conductive material layer, the first conductive material layer is between the first electrode and the dielectric material layer, and the second conductive material layer is between the dielectric material layer and the second electrode;

wherein the selector material stack further includes a first material layer between the first electrode and the first conductive material layer, the selector material stack further includes a second material layer between the first conductive material layer and the dielectric material layer, the first material layer has a different material composition from the first electrode and from the first conductive material layer, and the second material layer has a different material composition from the first conductive material layer and from the dielectric material layer.

24. The method of claim 23 , further comprising:

forming a storage element in series with the selector device.

25. The method of claim 24 , wherein the first electrode or the second electrode is shared with the storage element.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2018
From: KARPOV, ELJIAH V.; DOYLE, BRIAN S.; MAJHI, PRASHANT; SHARMA, ABHISHEK A.; PILLARISETTY, RAVI
To: INTEL CORPORATION
Reel/Frame 046726/0622 →
Continuity (1)
Related Publication 20200075851A1 · Mar 5, 2020
Cited By (1)
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