IP Library Granted Patent US 10,573,239
Granted Patent B2
US 10,573,239 · App. 16/119,655 · Granted Feb 25, 2020

Display apparatus

Inventors: Kazuyoshi Omata (Tokyo, JP); Hiroyuki Kimura (Tokyo, JP); Makoto Shibusawa (Tokyo, JP); Hiroshi Tabatake (Tokyo, JP)
Assignee: JAPAN DISPLAY INC.
G09G3/325G09G3/2003G09G3/32G09G3/3233G09G3/3258H01L27/3213H01L27/3248H01L27/3262H01L27/3265H01L27/3276H05B33/08H05B33/086H05B33/0896G09G2300/0426G09G2300/0452G09G2300/0819G09G2300/0852G09G2300/0861G09G2310/0262G09G2320/0233G09G2320/0252G09G2320/043H01L27/124H01L27/1255
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,573,239
App. No.
16/119,655
Granted
Feb 25, 2020
Kind
B2
Abstract

According to one embodiment, a display apparatus includes a plurality of semiconductor layers, a first insulation film, a first conductive layer, a second insulation film and a display element includes a second conductive layer. The first conductive layer and the second conductive layer are opposed to each other to form a capacitance unit.

Claims (38)

1. A display device having a plurality of pixels comprising:

a semiconductor layer;

a first insulation layer on the semiconductor layer;

a first conductive layer on the first insulation layer;

a second insulation layer on the first insulation layer and the first conductive layer;

a second conductive layer on the second insulation layer;

a third insulation layer on the second insulation layer and the second conductive layer;

a third conductive layer on the third insulation layer; and

a partition insulation layer on the third insulation layer and the third conductive layer;

wherein:

each of the plurality of pixels comprises:

a scanning line;

a video signal line intersecting the scanning line;

a display element between a high-potential power supply line and a low-potential power supply line; and

a drive transistor between the high-potential power supply line and the display element, configured to control a current value from the high-potential power supply line to the display element,

one of electrodes of the display element is formed in the third conductive layer,

a channel of the drive transistor is formed in the semiconductor layer,

a gate of the drive transistor is formed in the first conductive layer,

the partition insulation layer covers an edge of the one of electrodes of the display element, and includes an opening exposing a part of an upper surface of the one of electrodes of the display element,

the opening, the second conductive layer, and the gate of the drive transistor overlap in the plane view,

the second conductive layer extends between adjacent two pixels in the plurality of pixels continuously, and

the second conductive layer intersects the video signal line.

2. The display device according to claim 1 , wherein

the second conductive layer extends so as not to be in contact with the gate, and a source and a drain of the drive transistor.

3. The display device according to claim 1 , wherein

the high-potential power supply line is configured to be supplied with a high potential,

the low-potential power supply line is configured to be supplied with a low potential having lower than the high potential, and

the second conductive layer is configured to be supplied with one of the high potential and the low potential.

4. The display device according to claim 1 , further comprising:

an output switch between the high-potential power supply line and the drive transistor,

wherein

the output switch is configured to select whether to supply the current from the high-potential power supply line to the display element, and

the output switch is configured to be controlled by a signal different from that of the drive transistor.

5. The display device according to claim 4 , wherein

a channel of the output switch is further formed in the semiconductor layer.

6. The display device according to claim 1 , wherein

the scanning line is formed in the first conductive layer, and

the second conductive layer intersects the scanning line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
Priority Claims (3)
JP 2012-231740 · Oct 19, 2012 · national
JP 2013-012286 · Jan 25, 2013 · national
JP 2013-032359 · Feb 21, 2013 · national
Continuity (4)
Continuation 15365428 · Nov 30, 2016
Continuation 15167401 · May 27, 2016
Continuation 14056282 · Oct 17, 2013
Related Publication 20180374414A1 · Dec 27, 2018