IP Library Patent Application 16120131
Patent Application
App. No. 16/120,131

SEMICONDUCTOR PACKAGE

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Quick Facts
Patent No.
US None
App. No.
16/120,131
Abstract

A semiconductor package includes a support member having first and second surfaces opposing each other, including a cavity penetrating through the first and second surfaces, and having a primer layer disposed on the first surface; a connection member disposed on the first surface of the support member and having a redistribution layer, the primer layer being disposed between the connection member and the support member; a semiconductor chip having an active surface on which connection pads are disposed and an inactive surface opposing the active surface, the connection pads being electrically connected to the redistribution layer; and an encapsulant covering the second surface of the support member and the inactive surface of the semiconductor chip.

Claims (22)

1 . A semiconductor package comprising:

a support member having first and second surfaces opposing each other, including a cavity penetrating through the first and second surfaces, and having a first primer layer disposed on the first surface;

a connection member disposed on the first surface of the support member and having a redistribution layer, the first primer layer being disposed between the connection member and the support member;

a semiconductor chip having an active surface on which connection pads are disposed and an inactive surface opposing the active surface, the connection pads being electrically connected to the redistribution layer; and

an encapsulant covering the second surface of the support member and the inactive surface of the semiconductor chip.

2 . The semiconductor package of claim 1 , wherein the first primer layer is not formed on an inner side wall of the cavity.

3 . The semiconductor package of claim 1 , further comprising a second primer layer disposed on the second surface of the support member.

4 . The semiconductor package of claim 1 , wherein the support member includes a resin in which a reinforcing material is impregnated.

5 . The semiconductor package of claim 4 , wherein the reinforcing material includes at least one of a glass fiber, an organic filler, and an inorganic filler.

6 . The semiconductor package of claim 4 , wherein the first primer layer includes a resin layer that does not contain the reinforcing material.

7 . The semiconductor package of claim 6 , wherein the resin layer of the first primer layer is at least one of an epoxy resin and an acrylic resin.

8 . The semiconductor package of claim 1 , wherein the connection member includes an insulator formed of a photosensitive insulating resin.

9 . The semiconductor package of claim 1 , wherein an insulator of the connection member is in direct contact with the first primer layer.

10 . The semiconductor package of claim 1 , wherein the support member includes a wiring structure that connects an upper surface and a lower surface of the support member to each other.

11 . The semiconductor package of claim 10 , wherein the first primer layer is formed on a portion of the first surface of the support member, on which the wiring structure is not formed.

12 . A semiconductor package comprising:

a support member having first and second surfaces opposing each other, including a cavity penetrating through the first and second surfaces, and having first and second primer layers disposed on the first surface and the second surface, respectively;

a connection member disposed on the first surface of the support member and having an insulating member in direct contact with the first primer layer and a redistribution layer disposed on the insulating member;

a semiconductor chip having an active surface on which connection pads are disposed and an inactive surface opposing the active surface, the connection pads being electrically connected to the redistribution layer; and

an encapsulant covering the first surface of the support member and the inactive surface of the semiconductor chip,

wherein the support member includes a resin in which a reinforcing material is impregnated, and

the first and second primer layers include a resin layer that does not contain the reinforcing material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2019
From: SAMSUNG ELECTRO-MECHANICS CO., LTD.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 049350/0756 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2018
From: KIM, JOON SUNG; LEE, DOO HWAN; CHOI, JOO YOUNG; KIM, BYUNG HO; KIM, DA HEE; KIM, TAE WOOK
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 046771/0622 →