IP Library Granted Patent US 10,566,526
Granted Patent B1
US 10,566,526 · App. 16/122,019 · Granted Feb 18, 2020

Patterning of a magnetoresistance structure including two hard masks

Inventors: Yen Ting Liu (Hsinchu, TW); Maxim Klebanov (Manchester, NH); Paolo Campiglio (Arcueil, FR); Sundar Chetlur (Bedford, NH)
Assignee: Allegro MicroSystems, LLC
H01L43/12H01L43/08H01L43/10
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Quick Facts
Patent No.
US 10,566,526
App. No.
16/122,019
Granted
Feb 18, 2020
Kind
B1
Abstract

A method includes depositing on a substrate a magnetoresistance stack, depositing a first hard mask on the magnetoresistance stack, depositing a first photoresist on the first hard mask, patterning the first photoresist to expose portions of the first hard mask, and etching the exposed portions of the first hard mask to expose a portion of the magnetoresistance stack. The method further includes stripping the first photoresist, etching the exposed portions of the magnetoresistance stack and the first hard mask to form a first intermediate structure having a base and a pillar structure, depositing an etch barrier on the first intermediate structure, and depositing a second hard mask on the etch barrier. A second photoresist is deposited on the second hard mask. The method further includes patterning the second photoresist to expose portions of the second hard mask, etching the exposed portions of the second hard mask, stripping the second photoresist, etching a portion of the second hard mask, a portion of the etch barrier and the base to form a second intermediate structure, and depositing a capping barrier on the second intermediate structure.

Claims (38)

1. A method, comprising:

depositing on a substrate a magnetoresistance stack comprising a plurality of layers comprising a first set of one or more magnetoresistance layers and a second set of one or more magnetoresistance layers;

depositing a first hard mask on the magnetoresistance stack;

depositing a first photoresist on the first hard mask;

patterning the first photoresist using photolithography to expose portions of the first hard mask;

etching the exposed portions of the first hard mask to expose a portion of the magnetoresistance stack;

stripping the first photoresist;

etching the exposed portions of the magnetoresistance stack and the first hard mask to form a first intermediate structure having a base and a pillar structure;

depositing an etch barrier on the first intermediate structure;

depositing a second hard mask on the etch barrier;

depositing a second photoresist on the second hard mask;

patterning the second photoresist using photolithography to expose portions of the second hard mask;

etching the exposed portions of the second hard mask;

stripping the second photoresist;

etching a portion of the second hard mask, a portion of the etch barrier and a portion of the base to form a second intermediate structure; and

depositing a capping barrier on the second intermediate structure.

2. The method of claim 1 , wherein etching the exposed portions of the magnetoresistance stack and the first hard mask to form the first intermediate structure having the base and the pillar structure comprises etching the exposed portions of the magnetoresistance stack to form the first intermediate structure having the base, the base comprising:

a conductive layer on the substrate; and

an active element on the conductive layer.

3. The method of claim 1 , wherein etching the exposed portions of the magnetoresistance stack and the first hard mask to form the first intermediate structure having the base and the pillar structure comprises etching the exposed portions of the magnetoresistance stack and the first hard mask to form the first intermediate structure having the pillar structure, the pillar structure comprising:

the first hard mask;

capping material;

an active element; and

a tunneling barrier.

4. The method of claim 1 , wherein depositing on the substrate the magnetoresistance stack comprises depositing one of a tunneling magnetoresistance (TMR) stack or a magnetic tunnel junction (MTJ) stack.

5. The method of claim 1 , wherein depositing the capping barrier comprises depositing a capping barrier comprising silicon nitride.

6. The method of claim 1 , wherein depositing the magnetoresistance stack on the substrate comprises depositing a magnetoresistance stack comprising a layer of magnesium oxide.

7. The method of claim 1 , wherein depositing the magnetoresistance stack on the substrate comprises depositing a magnetoresistance stack comprising a layer of silicon nitride.

8. The method of claim 1 , wherein depositing the magnetoresistance stack on the substrate comprises depositing the magnetoresistance stack on the substrate, the substrate comprising one of silicon dioxide or silicon nitride.

9. The method of claim 1 , wherein depositing the first hard mask or the second hard mask comprises depositing silicon dioxide.

10. The method of claim 1 , wherein depositing an etch barrier comprises depositing an etch barrier comprising silicon nitride.

11. The method of claim 1 , wherein etching the exposed portions of the magnetoresistance stack comprises etching using an ion beam etching process.

12. The method of claim 1 , wherein etching the portion of the second hard mask, the portion of the etch barrier and the portion of the base comprises etching using an ion beam etching process.

13. The method of claim 1 , wherein depositing on the substrate a magnetoresistance stack having a plurality of layers comprising the first set of one or more magnetoresistance layers and the second set of one or more magnetoresistance layers comprises depositing on the substrate a magnetoresistance stack having the plurality of layers comprising:

a first set of one or more magnetoresistance layers comprising:

one or more active elements; and

a tunneling barrier layer;

a second set of one or more magnetoresistance layers comprising an active element.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS AT REEL 053957/FRAME 0874 Recorded Nov 1, 2023
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 065420/0572 →
RELEASE OF SECURITY INTEREST IN PATENTS (R/F 053957/0620) Recorded Jun 22, 2023
From: MIZUHO BANK, LTD., AS COLLATERAL AGENT
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 064068/0360 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2023
From: ALLEGRO MICROSYSTEMS, LLC
To: MORGAN STANLEY SENIOR FUNDING, INC., AS THE COLLATERAL AGENT
Reel/Frame 064068/0459 →
PATENT SECURITY AGREEMENT Recorded Oct 1, 2020
From: ALLEGRO MICROSYSTEMS, LLC
To: MIZUHO BANK LTD., AS COLLATERAL AGENT
Reel/Frame 053957/0620 →
PATENT SECURITY AGREEMENT Recorded Oct 1, 2020
From: ALLEGRO MICROSYSTEMS, LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 053957/0874 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2018
From: LIU, YEN TING; KLEBANOV, MAXIM; CAMPIGLIO, PAOLO; CHETLUR, SUNDAR; ALLEGRO MICROSYSTEMS FRANCE SAS; ALLEGRO MICROSYSTEMS EUROPE LIMITED; ALLEGRO MICROSYSTEMS BUSINESS DEVELOPMENT INC.
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 046800/0521 →
Cited By (4)
US 12,310,246 US 12,349,597 US 12,364,163 US 12,510,611