Conical magnetic random access memory pillar structures
An MRAM device is provided. The MRAM device includes a first electrode, an MRAM stack formed on the first electrode, a hardmask structure formed on the MRAM stack, and a second electrode formed on the hardmask structure. A width of an upper portion of the hardmask structure is less than a width of the MRAM stack.
1. A method of manufacturing a magnetic random-access memory (MRAM) device, the method comprising:
forming a first electrode;
forming an MRAM stack having a vertical sidewall profile on the first electrode;
forming a hardmask structure on the MRAM stack;
forming a second electrode on the hardmask structure; and
forming an interlayer dielectric (ILD) layer formed around the MRAM stack and the hardmask structure,
wherein a width of the ILD layer at a level of the hardmask structure is greater than a width of the ILD layer at a level of the MRAM stack.
2. The method according to claim 1 , wherein a width of an upper portion of the hardmask structure is less than a width of the MRAM stack.
3. The method according to claim 1 , wherein the hardmask structure includes
a first hardmask layer comprising a first material composition, and
a second hardmask layer formed on the first hardmask layer and comprising a second material composition, the first material composition being different than the second material composition,
wherein the second hardmask layer has a width that is less than that of the first hardmask layer.
4. The method according to claim 3 , further comprising forming a tapered portion of the first hardmask layer that extends from an upper surface of the first hardmask layer.
5. The method according to claim 4 , wherein the tapered portion has a taper angle ranging from 5 to 45 degrees relative to a vertical direction of the MRAM device.
6. The method according to claim 4 , wherein forming the tapered portion of the first hardmask layer includes:
forming the first hardmask layer and the second hardmask layer to a same width;
removing material of the second hardmask layer so that the second hardmask layer has a width less than that of the first hardmask layer;
depositing a spin on glass (SOG) layer on the MRAM stack, the SOG layer having a height that is less than a height of the first hardmask layer;
removing material of the first hardmask layer to form the tapered portion of the first hardmask layer, the tapered portion extending from an upper surface of the first hardmask layer to an upper surface of the SOG layer; and
removing the SOG layer.
7. The method according to claim 1 , wherein the first hardmask layer/second hardmask layer include a combination of materials selected from the group consisting of: TaN/WCN; TiN/WCN; TaAlN/WN; and TiAlN/WN.
8. The method according to claim 1 , wherein forming the hardmask structure includes forming a first hardmask layer having a tapered portion of the first hardmask layer that extends from an upper surface of the first hardmask layer.
9. The method according to claim 8 , wherein tapered portion of the first hardmask layer is formed with a reactive ion etching (RIE) process.
10. The method according to claim 9 , wherein the RIE process includes ion bombardment.
11. The method according to claim 8 , wherein forming the tapered portion of the first hardmask layer includes:
forming the first hardmask layer on the MRAM stack;
depositing a spin on glass (SOG) layer on the MRAM stack around the first hardmask layer, the SOG layer having a height that is less than a height of the first hardmask layer;
removing material of the first hardmask layer to form the tapered portion of the first hardmask layer, the tapered portion extending from an upper surface of the first hardmask layer to an upper surface of the SOG layer; and
removing the SOG layer.
12. The method according to claim 1 , wherein forming the MRAM stack includes forming a reference layer, forming a tunnel barrier layer on the reference layer, and forming a magnetic free layer on the reference layer.
13. The method according to claim 1 , further comprising forming a dielectric encapsulation layer around the MRAM stack.
14. A magnetic random-access memory (MRAM) device comprising:
a first electrode;
an MRAM stack having a vertical sidewall profile formed on the first electrode;
a hardmask structure formed on the MRAM stack;
a second electrode formed on the hardmask structure; and
an interlayer dielectric (ILD) layer formed around the MRAM stack and the hardmask structure,
wherein a width of the ILD layer at a level of the hardmask structure is greater than a width of the ILD layer at a level of the MRAM stack.
15. The MRAM device according to claim 14 , wherein a width of an upper portion of the hardmask structure is less than a width of the MRAM stack.
16. The MRAM device according to claim 14 , wherein the hardmask structure includes
a first hardmask layer comprising a first material composition, and
a second hardmask layer formed on the first hardmask layer and comprising a second material composition, the first material composition being different than the second material composition,
wherein the second hardmask layer has a width that is less than that of the first hardmask layer.
17. The MRAM device according to claim 16 , wherein the first hardmask layer includes a tapered portion that extends from an upper surface of the first hardmask layer.
18. The MRAM device according to claim 17 , wherein the tapered portion has a taper angle ranging from 5 to 45 degrees relative to a vertical direction of the MRAM device.
19. The MRAM device according to claim 14 , further comprising a dielectric encapsulation layer formed around the MRAM stack.
20. The MRAM device according to claim 14 , wherein the hardmask structure includes a combination of materials selected from the group consisting of: TaN/WCN; TiN/WCN; TaAlN/WN; and TiAlN/WN.
21. The MRAM device according to claim 14 , wherein the hardmask structure includes a first hardmask layer having a tapered portion of the first hardmask layer that extends from an upper surface of the first hardmask layer.
22. The MRAM device according to claim 21 , wherein the tapered portion of the first hardmask layer is formed with a reactive ion etching (RIE) process.
23. The MRAM device according to claim 22 , wherein the RIE process includes ion bombardment.
24. The MRAM device according to claim 14 , further comprising a top contact formed on the hardmask structure.
25. The MRAM device according to claim 14 , wherein the MRAM stack includes a reference layer, a tunnel barrier layer on the reference layer, and a magnetic free layer on the reference layer.