IP Library Granted Patent US 10,593,872
Granted Patent B2
US 10,593,872 · App. 16/123,235 · Granted Mar 17, 2020

Method of manufacturing semiconductor memory device

Inventors: Yasuyuki Sonoda (Seoul, KR); Bo Kyoung Jung (Icheon-si, KR)
Assignee: TOSHIBA MEMORY CORPORATION
H01L43/12G11C11/1655G11C11/1657G11C11/1659G11C11/1675H01L27/226H01L43/08H01L43/10
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Quick Facts
Patent No.
US 10,593,872
App. No.
16/123,235
Granted
Mar 17, 2020
Kind
B2
Abstract

According to one embodiment, an insulating layer is formed on a substrate. A hole is formed in the insulating layer. A metal layer is formed in the hole to fill the hole. A surface of the insulating layer and a surface of the metal layer is removed by etching with ion beams having a first angle, which etches both the insulating layer and the metal layer at a first etching rate. A resistance change element is formed on the metal layer.

Claims (26)

1. A method of manufacturing a semiconductor memory device, the method comprising:

forming an insulating layer on a substrate;

forming a hole in the insulating layer;

forming a metal layer in the hole to fill the hole;

removing a surface of the insulating layer and a surface of the metal layer by etching with ion beams having a first angle, both the insulating layer and the metal layer being etched at a first etching rate with the ion beams of the first angle; and

forming a resistance change element on the metal layer,

wherein the removing of the surface of the insulating layer and the surface of the metal layer forms a coplanar surface over the insulating layer and the metal layer in the hole.

2. A method of manufacturing a semiconductor memory device, the method comprising:

forming an insulating layer on a substrate;

forming a hole in the insulating layer;

forming a metal layer in the hole to fill the hole;

removing a surface of the insulating layer and a surface of the metal layer by etching with ion beams having a first angle, both the insulating layer and the metal layer being etched at a first etching rate with the ion beams of the first angle; and

forming a resistance change element on the metal layer,

wherein the removing of the surface of the metal layer includes removing an oxide of a metal on a top surface of the metal layer in the hole.

3. A method of manufacturing a semiconductor memory device, the method comprising:

forming an insulating layer on a substrate;

forming a hole in the insulating layer;

forming a metal layer in the hole to fill the hole;

removing a part of the metal layer on the insulating layer;

removing a surface of the insulating layer and a surface of the metal layer by etching with ion beams having a first angle after the removing of the part of the metal layer on the insulating layer, wherein both the insulating layer and the metal layer are etched at a first etching rate with the ion beams of the first angle, and wherein the removing of the surface of the metal layer includes removing an oxide of a metal on a top surface of the metal layer in the hole; and

forming a resistance change element on the metal layer.

4. The method according to claim 3 , wherein:

the removing of the surface of the insulating layer and the surface of the metal layer comprises exposing a first surface of the metal layer, and

the forming of the resistance change element on the metal layer comprises forming the resistance change element on the first surface of the metal layer.

5. The method according to claim 4 , wherein the forming of the metal layer in the hole comprises forming the metal layer in the hole to close an opening of the hole.

6. The method according to claim 4 , wherein the removing of the surface of the insulating layer and the surface of the metal layer forms a continuous surface over the insulating layer and the metal layer in the hole.

Assignments (2)
CHANGE OF NAME Recorded Jan 20, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058785/0197 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2018
From: SONODA, YASUYUKI; JUNG, BO KYOUNG
To: TOSHIBA MEMORY CORPORATION; SK HYNIX INC.
Reel/Frame 046801/0588 →
Priority Claims (1)
JP 2018-048215 · Mar 15, 2018 · national
Continuity (1)
Related Publication 20190288188A1 · Sep 19, 2019