Patent Assignment
Reel/Frame 058785/0197
Change of Name
Recorded: 2022-01-20
Pages: 61
Assignor
TOSHIBA MEMORY CORPORATION
Executed: 2019-10-01
Assignee
KIOXIA CORPORATION
1-21, SHIBAURA 3-CHOME, MINATO-KU, TOKYO, JAPAN
Covered Properties
(135)
Semiconductor Memory Device for Storing Multivalued Data
Semiconductor Memory Device Which Stores Plural Data in a Cell
Semiconductor Device with Sealed Semiconductor Chip
Method for Transferring Data on a Memory Card in Synchonism with a Rise Edge and a Fall Edge of a Clock Signal
Semiconductor Memory System Including First and Second Semiconductor Memory Chips and a Common Signal Line
Semiconductor Memory Device and Method of Controlling the Same
Semiconductor Storage Device with Volatile and Nonvolatile Memories to Allocate Blocks to a Memory and Release Allocated Blocks
Nonvolatile Semiconductor Memory Including a Read Operation
Semiconductor Memory Device with Memory Cells Each Including a Charge Accumulation Layer and a Control Gate
Semiconductor Memory Device Capable of Reducing Chip Size
Semiconductor Device and Memory System
Semiconductor Device and Memory System
Semiconductor Device
Patent:
49,424 →
Application:
17/199,945 →
Memory System Performing Read Operation with Read Voltage
System, Device, and Method for Initializing a Plurality of Electronic Devices Using a Single Packet
Patent:
49,682 →
Application:
17/176,474 →
Controlling Method of a Memory Card
Data Reading and Writing Processing from and to a Semiconductor Memory and a Memory of a Host Device by Using First and Second Interface Circuits
Memory Device and Host Device
Information Processing System
Memory Device Controlling Including Reading from a First Memory and Writing to a Second Memory Based on Timing and Control Signals
Semiconductor Memory Device
Semiconductor Device
Semiconductor Memory Device
Semiconductor Storage Device and Memory System
Memory Device, Host Device, Memory System, Memory Device Control Method, Host Device Control Method and Memory System Control Method
Patent:
49,235 →
Application:
17/135,608 →
Semiconductor Storage Device and Memory System Including Semiconductor Storage Device and Controller
Multi-Bit Memory System with Adaptive Read Voltage Controller
Semiconductor Memory Device
Semiconductor Memory Device with First and Second Sense Amplifiers
Semiconductor Memory
Memory System Including the Semiconductor Memory and a Controller
Memory System
Memory System
Controller That Acquires Status of Nonvolatile Memory and Control Method Thereof
Semiconductor Memory Device
Semiconductor Device and Method of Manufacturing the Same
Semiconductor Memory Device
Information Processing Device, Information Processing Method, and Information Processing Program Product
Application:
16/568,680 →
Publication:
US US20200003571A1
Method of Detecting Anomalies in Waveforms, and System Thereof
Memory Device
Memory Device
Memory System
Semiconductor Memory Device
Semiconductor Memory Device
Application:
16/123,133 →
Publication:
US US20190296041A1
Information Processing Device, Information Processing Method, and Information Processing Program Product
Semiconductor Memory with Different Threshold Voltages of Memory Cells
Memory System
Memory System
Memory System
Calculating Shift Amounts for Read Voltage Correction
Memory System
Memory System
Semiconductor Memory Device
Semiconductor Memory Device
Method of Controlling a Semiconductor Memory
Arithmetic Device and Method for Controlling the Same
Application:
16/355,767 →
Publication:
US US20190354866A1
Information Processing Apparatus for Convolution Operations in Layers of Convolutional Neural Network
Application:
16/291,471 →
Publication:
US US20200026998A1
Semiconductor Memory Device
Semiconductor Memory Device and Erase Verify Operation
Semiconductor Memory and Method of Manufacturing the Semiconductor Memory
Semiconductor Memory and Method of Manufacturing the Semiconductor Memory
Semiconductor Memory
Application:
17/336,940 →
Publication:
US US20210288074A1
Semiconductor Memory Device
Semiconductor Memory Device Having a Passivation Film and a Plurality of Insulating Patterns on a Memory Cell Array
Semiconductor Memory
Semiconductor Memory Device
Semiconductor Memory Device
Memory System
Semiconductor Memory Device to Hold 5-Bits of Data Per Memory Cell
Semiconductor Memory Device
Semiconductor Memory Device
Information Processing Apparatus and Method
Information Processing Method and Apparatus
Application:
16/565,810 →
Publication:
US US20200302287A1
Information Processing Method and Apparatus
Application:
16/566,241 →
Publication:
US US20200293895A1
Multiprocessor System and Method for Controlling Shared Memory
Semiconductor Memory Device
Semiconductor Memory Device
Voltage-Variable Type Memory Element and Semiconductor Memory Device Having the Same
Application:
16/568,645 →
Publication:
US US20200295038A1
Memory System Having High Data Transfer Efficiency and Host Controller
Patent:
49,875 →
Application:
17/396,421 →
Voltage Generation Circuit Which Is Capable of Executing High-Speed Boost Operation
Memory System for Restraining Threshold Variation to Improve Data Reading
Information Processing System Including Host Device and Memory System
Semiconductor Memory Device
Application:
17/542,131 →
Publication:
US US20220093643A1
Semiconductor Memory Device Using Multiple Operations to Erase Neighboring Memory Cells
Application:
17/530,675 →
Publication:
US US20220077175A1
Semiconductor Memory Device
Memory System Including the Semiconductor Memory and a Controller
Memory System
Nonvolatile Random Access Memory
Nonvolatile Random Access Memory Including Control Circuit Configured to Receive Commands at High and Low Edges of One Clock Cycle
Nonvolatile Random Access Memory Including Control Circuit Configured to Receive Commands at High and Low Edges of One Clock Cycle
Memory Device
Memory Device
Memory Device
Resistance Change Memory
Resistance Change Memory
Resistance Change Memory
Resistance Change Memory
Resistance Change Memory
Resistance Change Memory and Test Method of the Same
Semiconductor Memory Device
Semiconductor Memory Device
Semiconductor Memory Device
Semiconductor Memory Device
Non-Volatile Semiconductor Memory Device, Electronic Card Using the Same and Electronic Apparatus
Non-Volatile Semiconductor Memory Device, Electronic Card Using the Same and Electronic Apparatus
Resistance Change Memory
Temperature sensor with Successive AD conversion with selective comparisons
Method of Manufacturing Semiconductor Device
Memory System Which Copies Successive Pages, and Data Copy Method Therefor
Nand Flash Memory and Blank Page Search Method Therefor
Nand Flash Memory and Blank Page Search Method Therefor
Wafer Flatness Evaluation Method, Wafer Flatness Evaluation Apparatus Carrying Out the Evaluation Method, Wafer Manufacturing Method Using the Evaluation Method, Wafer Quality Assurance Method Using the Evaluation Method, Semiconductor Device Manufacturing Method U
Wafer Flatness Evaluation Method, Wafer Flatness Evaluation Apparatus Carrying Out the Evaluation Method, Wafer Manufacturing Method Using the Evaluation Method, Wafer Quality Assurance Method Using the Evaluation Method, Semiconductor Device Manufacturing Method U
Wafer Flatness Evaluation Method, Wafer Flatness Evaluation Apparatus Carrying Out the Evaluation Method, Wafer Manufacturing Method Using the Evaluation Method, Wafer Quality Assurance Method Using the Evaluation Method, Semiconductor Device Manufacturing Method U
Nand Flash Memory and Blank Page Search Method Therefor
Memory System and Memory Control Method
Storage Device
Pattern Test Apparatus
Distortion Reduction of Memory Openings in a Multi-Tier Memory Device Through Thermal Cycle Control
Patent:
10,224,240 →
Application:
15/635,023 →
Behavior Based Programming of Non-Volatile Memory
Non-Volatile Semiconductor Memory with Large Erase Blocks Storing Cycle Counts
Non-Volatile Semiconductor Memory with Large Erase Blocks Storing Cycle Counts
Semiconductor Memory Device
Semiconductor Device and Method for Manufacturing the Same
Semiconductor Device and Method for Manufacturing the Same
Method for Manufacturing Soi Substrate
Method of Manufacturing Soi Substrate
Method of Manufacturing Semiconductor Memory Device
Magnetic Device and Manufacturing Method of Magnetic Device
Magnetic Device
Defect Gradient to Boost Nonvolatile Memory Performance
Current-Limiting Layer and a Current-Reducing Layer in a Memory Device
Nonvolatile Memory Device Using a Tunnel Oxide as a Current Limiter Element
Nonvolatile Resistive Memory Element with a Passivated Switching Layer
Alignment Sensing Method for Semiconductor Device
Related Assignments
(1)
Other recorded transfers of the patents in this record — the chain of ownership.