IP Library Granted Patent US 11,573,701
Granted Patent B2
US 11,573,701 · App. 17/196,390 · Granted Feb 7, 2023

Memory device and host device

Inventor: Akihisa Fujimoto (Yamato, JP)
Assignee: KIOXIA CORPORATION
G06F3/0608G06F3/0658G06F3/0679G06F12/0246G06F13/4234G06F2212/1016G06F2212/1044G06F2212/177G06F2212/7202
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Quick Facts
Patent No.
US 11,573,701
App. No.
17/196,390
Granted
Feb 7, 2023
Kind
B2
Abstract

According to one embodiment, a memory device includes a nonvolatile semiconductor memory having physical storage areas that includes a user area externally accessible and are divided into management units and a control unit. The control unit receives a control command having a first argument to designate a sequential write area and a read command or a write command, assigns a management unit represented by an address of the read command or the write command as the sequential write area, and changes memory access control by judging whether an address of a memory access command to access the user area indicates access in the sequential write area whose size is equivalent to the management unit.

Claims (29)

1. A method of controlling a memory card, the memory card including a nonvolatile semiconductor memory having a plurality of physical storage areas that include a user area externally accessible, the user area being divided into plurality of allocation units,

the method comprising:

receiving a control command having a first argument to designate a sequential write area and a read command or a write command;

assigning an allocation unit of the plurality of allocation units represented by an address of the read command or the write command as the sequential write area; and

changing memory access control when an address of a memory access command to access the user area indicates no access in the sequential write area whose size is equivalent to the allocation unit, wherein

the allocation unit of the plurality of allocation units is divided into plurality of recording units,

the memory access control includes controlling a busy time according to a data length of the write command and one or plurality of recording unit, and

when the address of the write command for the sequential write area is an address not to cause overwrite, the data length of the write command is equivalent to one or plurality of recording unit and a data location is on a recording unit boundary, the method further including: controlling a busy time to make average write performance higher than a performance index, and if the condition is not met, indicating a busy time that does not meet the performance index.

2. The method according to claim 1 , wherein the memory access control includes controlling to maintain data in unwritten areas.

3. The method according to claim 1 , wherein

the memory card further includes a buffer,

the buffer temporarily stores a predetermined amount of data, and

the memory access control includes controlling to store the predetermined amount of data in the buffer.

4. The method according to claim 1 , further comprising:

setting an area in the allocation unit from an address position of the read command or a position next to data written by the write command to an end of the allocation unit as an area in which next data can be written, and if data stored in an area before the address designated by the read command or the write command exists, preserves the data.

5. The method according to claim 1 , wherein

the memory card further includes a register, and

the register holds a performance index which indicates minimum average write performance to the sequential write area and a size of an allocation unit of the plurality of allocation units, wherein the performance index and the size of the allocation unit can externally be read out.

6. The method according to claim 1 , further comprising:

receiving a control command having a second argument to designate an overwrite area and the read command or the write command;

assigning an allocation unit of the plurality of allocation units whose start position is represented by the address of the read command or the write command as the overwrite area; and

changing the memory access control by judging concerning the memory access command to access the user area whether the address of the memory access command indicates access in the overwrite area.

7. The method according to claim 6 , wherein a size of the overwrite area is determined by one of a third argument of the control command or a size of a data area accessed by the read command or the write command.

8. The method according to claim 6 , further comprising:

receiving a control command having a fourth argument to designate a data area of a file system and the read command whose address indicates a start address of the data area of the file system; and

assigning the user area as a overwrite area based on the address of the read command.

9. The method according to claim 6 , wherein

the control command has a fifth argument to designate the sequential write area first, and

the method further including: processing the control command having the fifth argument as the control command having the first argument.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Jan 20, 2022
From: TOSHIBA MEMORY CORPORATION; K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 058785/0124 →
CHANGE OF NAME Recorded Jan 20, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058785/0197 →