IP Library Granted Patent US 10,700,706
Granted Patent B2
US 10,700,706 · App. 16/128,102 · Granted Jun 30, 2020

Memory system with decoders and method of operating such memory system and decoders

Inventors: Fan Zhang (Fremont, CA); Aman Bhatia (San Jose, CA); Chenrong Xiong (San Jose, CA); Naveen Kumar (San Jose, CA); Yu Cai (San Jose, CA)
Assignee: SK hynix Inc.
H03M13/1108G06F11/1012G11C29/14G11C29/42G11C29/44G11C29/52H03M13/112H03M13/1117H03M13/1575H03M13/3707H03M13/3715G11C2029/0411G11C2029/4402
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Quick Facts
Patent No.
US 10,700,706
App. No.
16/128,102
Granted
Jun 30, 2020
Kind
B2
Abstract

A memory system, a controller including a bit-flipping (BF) decoder and a min-sum (MS) decoder that may be included in the memory system and operating methods thereof in which the controller determines a quality metric as a function of initial syndrome weight and information of the BF decoder after a set number of decoding iterations by the BF decoder in a test period. After the test period, the controller applies the quality metric to each codeword to determine whether to send that codeword first to the BF decoder for decoding or directly to the MS decoder for decoding.

Claims (36)

1. A memory system, comprising

a memory device; and

a controller in communication with, and configured to control, the memory device, the controller comprising

a storage configured to store codewords read by the controller from the memory device,

a bit-flipping (BF) decoder in communication with the storage, and

a min-sum (MS) decoder in communication with the storage;

wherein, in a test period, the controller is configured to determine a quality metric as a function of initial syndrome weight and information of the BF decoder after a set number of decoding iterations by the BF decoder, and

wherein, after the test period, the controller is configured to apply the quality metric to each codeword retrieved after the test period to determine whether to send that codeword first to the BF decoder for decoding or to the MS decoder for decoding.

2. The memory system of claim 1 , wherein the information of the BF decoder includes total number of bits flipped for a select codeword, hamming distance between receiving the select codeword and a hard decision on the select codeword, syndrome weight, and total number of bits flipped for all codewords during the test period.

3. The memory system of claim 1 , wherein the set number of decoding iterations in the test period is 1, 2 or 3.

4. The memory system of claim 1 , wherein, in determining the quality metric in the test period, the controller determines a threshold with respect to a number of unsatisfied checks (USC) during the test period.

5. The memory system of claim 4 , wherein in determining whether to send a select codeword first to the BF decoder for decoding or to the MS decoder for decoding after the test period, the controller compares the number of USC for the select codeword, before decoding, with the threshold.

6. The memory system of claim 5 , wherein, when the number of USC for the select codeword is higher than the threshold, the controller sends the select codeword to the MS decoder first, bypassing the BF decoder.

7. The memory system of claim 5 , wherein, when the number of USC for the select codeword is lower than the threshold, the controller sends the select codeword to the BF decoder first.

8. The memory system of claim 7 , wherein the controller sends the select codeword to the MS decoder after the BF decoder when the BF decoder fails to successfully decode the select codeword.

9. A controller, comprising:

a storage configured to store codewords read by the controller from a memory device; and

a decoding assembly in communication with the storage, the decoding assembly comprising a bit-flipping (BF) decoder and a min-sum (MS) decoder;

wherein, in a test period, the controller is configured to determine a quality metric as a function of initial syndrome weight and information of the BF decoder after a set number of decoding iterations by the BF decoder, and

wherein, after the test period, the controller is configured to apply the quality metric to each codeword retrieved after the test period to determine whether to send that codeword first to the BF decoder for decoding or to the MS decoder for decoding.

10. The controller claim 9 , wherein the information of the BF decoder includes total number of bits flipped for a select codeword, hamming distance between receiving the select codeword and a hard decision on the select codeword, syndrome weight, and total number of bits flipped for all codewords during the test period.

11. The controller of claim 9 , wherein, in determining the quality metric in the test period, the controller determines a threshold with respect to a number of unsatisfied checks (USC) during the test period.

12. The controller of claim 11 , wherein in determining whether to send a select codeword first to the BF decoder for decoding or to the MS decoder for decoding after the test period, the controller compares the number of USC for the select codeword before decoding with the threshold.

13. The controller of claim 12 , wherein, when the number of USC for the select codeword is higher than the threshold, the controller sends the select codeword to the MS decoder first, bypassing the BF decoder, and when the number of USC for the select codeword is lower than the threshold, the controller sends the select codeword to the BF decoder first.

14. A method of operating a memory system, comprising

inputting codewords from a memory device of the memory system to a controller of the memory system;

performing multiple iterations of decoding by a bit-flipping (BF) decoder of the memory system during a test period to generate information of the BF decoder;

determining a quality metric as a function of the information of the BF decoder and initial syndrome weight;

applying the quality metric to each codeword retrieved from the memory device by the controller after the test period; and

determining whether to send each codeword, based on the applying, first to the BF decoder for decoding or to a min-sum (MS) decoder of the memory system for decoding.

15. The method of claim 14 , wherein the information of the BF decoder includes total number of bits flipped for a select codeword, hamming distance between receiving the select codeword and a hard decision on the select codeword, syndrome weight, and total number of bits flipped for all codewords during the test period.

16. The method of claim 14 , wherein the determining of the quality metric further comprises determining a threshold with respect to a number of unsatisfied checks (USC) during the test period.

17. The method of claim 16 , wherein the determining of whether to send each codeword, based on the applying, first to the BF decoder for decoding or to the min-sum (MS) decoder for decoding, further comprises comparing the number of USC for the select codeword, before decoding, with threshold.

18. The method of claim 17 , wherein, when the result of the comparing is that the number of USC for the select codeword is higher than the threshold, the method further comprises sending the select codeword to the MS decoder first, bypassing the BF decoder.

19. The method of claim 17 , wherein, when the result of the comparing is that the number of USC for the select codeword is lower than the threshold, the method further comprises sending the select codeword to the BF decoder first.

20. The method of claim 19 , wherein, after sending the select codeword to the BF decoder, the method further comprises sending the select codeword to the MS decoder when the BF decoder fails to successfully decode the select codeword.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 4, 2018
From: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
To: SK HYNIX INC.
Reel/Frame 047672/0841 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2018
From: BHATIA, AMAN; KUMAR, NAVEEN
To: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
Reel/Frame 047085/0251 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2018
From: ZHANG, FAN; XIONG, CHENRONG; CAI, YU
To: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
Reel/Frame 046843/0430 →
Continuity (2)
Provisional Application 62562139 · Sep 22, 2017
Related Publication 20190097653A1 · Mar 28, 2019
Cited By (2)
US 12,401,377 US 12,487,754