IP Library Granted Patent US 10,504,589
Granted Patent B2
US 10,504,589 · App. 16/130,682 · Granted Dec 10, 2019

Memory device architecture

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Quick Facts
Patent No.
US 10,504,589
App. No.
16/130,682
Granted
Dec 10, 2019
Kind
B2
Abstract

Row electrode drivers and column electrode drivers for a memory device are distributed within a footprint share by a memory cell array.

Claims (13)

1. A device, comprising:

a plurality of memory cells within a footprint of the device; and

a plurality of word line drivers and digit line drivers in a circuit level positioned below the plurality of memory cells, wherein the circuit level comprises a plurality of word line driver connection points and digit line driver connection points within the footprint.

2. The device of claim 1 , wherein the plurality of word line drivers are distributed across and within the footprint in a plurality of word line driver regions, and wherein the plurality of digit line drivers are distributed across and within the footprint in a plurality of digit line driver regions.

3. The device of claim 2 , wherein word line electrodes connecting the plurality of word line drivers to the plurality of memory cells of the device are staggered relative to one another by shifting the word line electrodes relative to one another along their axis of elongation.

4. The device of claim 3 , wherein digit line electrodes connecting the plurality of digit line drivers to the plurality of memory cells of the device are staggered relative to one another by shifting the digit line electrodes relative to one another along their axis of elongation.

5. The device of claim 1 , wherein the plurality of memory cells comprises word lines positioned along a first direction and digit lines positioned along a second direction different from the first direction.

6. The device of claim 1 , further comprising:

a plurality of word lines each coupled with at least one of the plurality of word line drivers at a different vertical level from the plurality of word line drivers.

7. The device of claim 6 , wherein each word line driver connection point of the plurality of word line driver connection points is positioned along a word line direction within a word line driver region of a plurality of word line driver regions.

8. The device of claim 1 , further comprising:

a plurality of digit lines each coupled with at least one of the plurality of digit line drivers at a different vertical level from the plurality of digit line drivers.

9. The device of claim 8 , wherein each of the digit line driver connection points is positioned along a digit line direction within a digit line driver region of a plurality of digit line driver regions.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051041/0317 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050724/0392 →
SUPPLEMENT NO. 12 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048948/0677 →
SUPPLEMENT NO. 3 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048951/0902 →