IP Library Granted Patent US 11,081,783
Granted Patent B2
US 11,081,783 · App. 16/134,315 · Granted Aug 3, 2021

Integrated antenna using through silicon vias

Inventor: Owen R. Fay (Meridian, ID)
Assignee: Micron Technology, Inc.
H01Q1/38H01L21/76898H01L23/481H01L23/5256
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Quick Facts
Patent No.
US 11,081,783
App. No.
16/134,315
Granted
Aug 3, 2021
Kind
B2
Abstract

Systems and methods of manufacture are disclosed for semiconductor device assemblies having a front side metallurgy portion, a substrate layer adjacent to the front side metallurgy portion, a plurality of through-silicon-vias (TSVs) in the substrate layer, metallic conductors located within at least a portion of the plurality of TSVs, and at least one conductive connection circuitry between the metallic conductors and the front side metallurgy portion. The plurality of TSVs with metallic conductors located within are configured to form an antenna structure. Selectively breakable connective circuitry is used to form and/or tune the antenna structure.

Claims (43)

1. A semiconductor device assembly comprising:

a front side metallurgy portion;

a substrate layer adjacent to the front side metallurgy portion;

a plurality of through-silicon-vias (TSVs) in the substrate layer;

metallic conductors located within at least a portion of the plurality of TSVs; at least one conductive connection circuitry between the metallic conductors and the front side metallurgy portion, wherein the at least one conductive connection is between a first portion of the metallic conductors and a first portion of the front side metallurgy portion and the semiconductor device assembly further comprises:

a second conductive connection between a second portion of the metallic conductors and a second portion of the front side metallurgy portion; and

wherein the portion of the plurality of TSVs with metallic conductors located within are configured to form an antenna structure.

2. The semiconductor device assembly of claim 1 wherein each of the plurality of TSVs is generally cylindrical in shape.

3. The semiconductor device assembly of claim 2 wherein the generally cylindrical shape has a diameter of substantially 2 microns to 30 microns and a depth of substantially 20 microns to 100 microns.

4. The semiconductor device assembly of claim 2 wherein the generally cylindrical shape has a diameter of substantially 8 microns and a depth of substantially 65 microns.

5. The semiconductor device assembly of claim 1 wherein the antenna structure covers an area up to substantially 20 mm 2 .

6. The semiconductor device assembly of claim 1 wherein the antenna structure covers an area of substantially 2 mm 2 to 6 mm 2 .

7. The semiconductor device assembly of claim 1 further comprising:

third conductive connections between each of the metallic conductors located within at least a portion of the plurality of TSVs.

8. The semiconductor device assembly of claim 7 wherein the third conductive connections between each of the metallic conductors located within at least a portion of the plurality of TSVs further comprise selectively breakable connections.

9. The semiconductor device assembly of claim 8 wherein selected ones of the selectively breakable connections are broken to tune the antenna structure.

10. The semiconductor device assembly of claim 1 wherein the antenna structure comprises a 5G antenna structure.

11. A method of making a semiconductor device assembly comprising:

providing a front side metallurgy portion;

providing a substrate layer adjacent to the front side metallurgy portion;

providing a plurality of through-silicon-vias (TSVs) in the substrate layer;

providing metallic conductors located within at least a portion of the plurality of TSVs;

providing at least one conductive connection between the metallic conductors and the front side metallurgy portion;

connecting a first portion of the metallic conductors and a first portion of the front side metallurgy portion to form the at least one conductive connection;

providing a second conductive connection between a second portion of the metallic conductors and a second portion of the front side metallurgy portion; and

configuring the portion of the plurality of TSVs with metallic conductors located within to form an antenna structure.

12. The method of making a semiconductor device assembly of claim 11 further comprising:

forming each of the plurality of TSVs in a substantially cylindrical shape.

13. The method of making a semiconductor device assembly of claim 12 further comprising:

forming each generally cylindrical shape with a diameter of substantially 2 microns to 30 microns and a height of substantially 20 microns to 100 microns.

14. The method of making a semiconductor device assembly of claim 12 further comprising:

forming each generally cylindrical shape with a diameter of substantially 8 microns and a height of substantially 65 microns.

15. The method of making a semiconductor device assembly of claim 11 further comprising:

forming the antenna structure to cover an area ranging up to substantially 20 mm 2 .

16. The method of making a semiconductor device assembly of claim 11 further comprising:

forming the antenna structure to cover an area ranging from substantially 2 mm 2 to 6 mm 2 .

17. The method of making a semiconductor device assembly of claim 11 further comprising:

providing third conductive connections between each of the metallic conductors located within at least a portion of the plurality of TSVs.

18. The method of making a semiconductor device assembly of claim 17 further comprising:

providing selectively breakable connections as the third conductive connections between each of the metallic conductors located within at least a portion of the plurality of TSVs.

19. The method of making a semiconductor device assembly of claim 18 further comprising:

breaking selected ones of the selectively breakable connections to tune the antenna structure.

20. The method of making a semiconductor device assembly of claim 11 wherein the step of configuring the portion of the plurality of TSVs with metallic conductors located within to form an antenna structure comprises forming a 5G antenna structure.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051041/0317 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050724/0392 →
SUPPLEMENT NO. 12 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048948/0677 →
SUPPLEMENT NO. 3 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048951/0902 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2018
From: FAY, OWEN R.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046900/0611 →
Continuity (1)
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