IP Library Granted Patent US 10,607,889
Granted Patent B1
US 10,607,889 · App. 16/136,026 · Granted Mar 31, 2020

Jet ablation die singulation systems and related methods

Inventor: Michael J. Seddon (Gilbert, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L21/78H01L21/3046H01L21/3065H01L21/561H01L23/3171
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Quick Facts
Patent No.
US 10,607,889
App. No.
16/136,026
Granted
Mar 31, 2020
Kind
B1
Abstract

Implementations of a method singulating a plurality of semiconductor die. Implementations may include: forming a pattern in a back metal layer coupled on a first side of a semiconductor substrate where the semiconductor substrate includes a plurality of semiconductor die. The method may include etching substantially through a thickness of the semiconductor substrate at the pattern in the back metal layer and jet ablating a layer of passivation material coupled to a second side of the semiconductor substrate to singulate the plurality of semiconductor die.

Claims (27)

1. A method of singulating a plurality of semiconductor die, the method comprising:

forming a pattern using a photoresist in a back metal layer coupled on a first side of a semiconductor substrate, the semiconductor substrate comprising a plurality of semiconductor die;

etching substantially through a thickness of the semiconductor substrate at the pattern in the back metal layer; and

jet ablating a layer of passivation material coupled to a second side of the semiconductor substrate to singulate the plurality of semiconductor die.

2. The method of claim 1 , further comprising demounting the semiconductor substrate from a first tape and mounting the semiconductor substrate to a second tape.

3. The method of claim 2 , wherein demounting the semiconductor substrate from the first tape further comprises demounting after etching substantially through the thickness of the semiconductor substrate.

4. The method of claim 1 , further comprising mounting the semiconductor substrate to a first tape after etching substantially through a thickness of the semiconductor substrate.

5. The method of claim 1 , wherein jet ablating the layer of passivation material further comprises jet ablating from the second side of the semiconductor substrate.

6. The method of claim 1 , wherein jet ablating the layer of passivation material further comprises jet ablating from the first side of the semiconductor substrate.

7. The method of claim 1 , wherein etching substantially through the thickness of the semiconductor substrate further comprises plasma etching.

8. The method of claim 1 , wherein the thickness of the semiconductor substrate is less than 50 microns.

9. The method of claim 1 , wherein the thickness of the semiconductor substrate is 25 microns.

10. The method of claim 1 , wherein the back metal comprises a thickness between 1 micron to 15 microns.

11. The method of claim 1 , wherein the back metal comprises a thickness between 1 micron to 3 microns.

12. A method of singulating a plurality of semiconductor die, the method comprising:

forming a pattern in a back metal layer coupled on a first side of a semiconductor substrate, the semiconductor substrate comprising a plurality of semiconductor die, wherein the pattern is formed through a photolithography process;

mounting the semiconductor substrate to a first tape;

etching substantially through a thickness of the semiconductor substrate at the pattern in the back metal layer; and

jet ablating a layer of passivation material coupled to a second side of the semiconductor substrate to singulate the plurality of semiconductor die.

13. The method of claim 12 , further comprising demounting the semiconductor substrate from the first tape and mounting the semiconductor substrate to a second tape.

14. The method of claim 13 , wherein demounting the semiconductor substrate from the first tape further comprises demounting after etching substantially through the thickness of the semiconductor substrate.

15. The method of claim 12 , wherein jet ablating the layer of passivation material further comprises jet ablating from the second side of the semiconductor substrate.

16. The method of claim 12 , wherein jet ablating the layer of passivation material further comprises jet ablating from the first side of the semiconductor substrate.

17. The method of claim 12 , wherein etching substantially through the thickness of the semiconductor substrate further comprises plasma etching.

18. The method of claim 12 , wherein the thickness of the semiconductor substrate is less than 50 microns.

19. The method of claim 12 , wherein the thickness of the semiconductor substrate is 25 microns.

20. The method of claim 12 , wherein the back metal comprises a thickness between 1 micron to 15 microns.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 047399, FRAME 0631 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064078/0001 →
SECURITY INTEREST Recorded Nov 1, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047399/0631 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2018
From: SEDDON, MICHAEL J.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 046916/0653 →
Cited By (2)
US 12,354,917 US 12,477,829