Methods of command based and current limit controlled memory device power up
Methods for powering up a memory device, for example, are disclosed. One such memory device includes power up circuitry configured to receive an external power supply and to provide an internal power supply to the memory device upon receipt of a command. The power up circuitry may be configured to provide the internal power supply limited to a peak current, or may be configured to provide the internal power supply not limited to a peak current. The memory device may be, for example, a synchronous dynamic random access memory (SDRAM) device or Flash memory.
1. A method of powering one or more memory devices comprising:
receiving an external power supply;
powering a first portion of a memory device;
receiving a command; and
powering a second portion of the memory device in response to receiving the command, wherein powering the second portion of the memory device comprises supplying a current-limited internal power.
2. The method of claim 1 , comprising regulating the external power supply in an internal vcc regulator with current control to limit the current-limited power supply to a peak current limit.
3. The method of claim 2 , wherein the peak current limit is between 4 milliamps (mA) and 20 mA.
4. The method of claim 1 , comprising receiving an additional command and supplying a non-current-limited internal power supply to the second portion of the memory.
5. The method of claim 4 , comprising resetting latches of the second portion of the memory before supplying the non-current-limited internal power supply to the second portion of the memory.
6. The method of claim 1 , wherein powering the second portion of the memory device comprises powering all remaining circuits of the memory device not of the first portion.
7. The method of claim 1 , comprising powering a first portion of another memory device while powering the first portion of the memory device and powering a second portion of the other memory device after powering the second portion of the memory device.
8. The method of claim 1 , wherein receiving the command comprises receiving the command from a serial peripheral interface bus (SPI).
9. A method of powering one or more memory devices comprising:
receiving an external power supply;
powering a first portion of a memory device;
receiving a command; and
powering a second portion of the memory device in response to receiving the command, wherein powering the second portion of the memory device, comprises supplying a current limit controlled power supply from power up circuitry on the memory device.
10. The method of claim 9 , comprising mirroring a reference current from a current source to supply the current limit controlled power supply from the power up circuitry to the second portion of the memory device.
11. The method of claim 9 , comprising regulating the external power supply in an internal vcc regulator with current control to limit the current limit controlled power supply to a peak current limit.
12. The method of claim 11 , wherein the peak current limit is between 4 milliamps (mA) and 20 mA.
13. The method of claim 9 , comprising receiving an additional command and supplying a non-current-limited controlled power supply to the second portion of the memory.
14. A method of powering one or more memory devices comprising:
receiving an external power supply at power up circuitry of a memory device;
receiving a command;
supplying a current limit controlled power supply from the power up circuitry, utilizing the external power supply in response to receiving the command; and
powering the memory device with a current limit controlled power supply from the power up circuitry on the memory device.
15. The method of claim 14 , wherein the external power supply is a VCC power supply.
16. The method of claim 14 , wherein the current limit controlled power supply comprises a peak current limit between 4 milliamps (mA) and 20 mA.
17. The method of claim 14 , comprising mirroring a reference current from a current source to supply the current limit controlled power supply from the power up circuitry.
18. The method of claim 14 , comprising supplying a non-current-limited controlled power supply to the memory device after supplying the current limit controlled power supply for a predetermined amount of time.
19. The method of claim 18 , comprising resetting latches of at least a portion of the memory device before supplying the non-current-limited controlled power supply.