IP Library Granted Patent US 10,810,119
Granted Patent B2
US 10,810,119 · App. 16/138,867 · Granted Oct 20, 2020

Scrubber driven wear leveling in out of place media translation

Inventors: Justin Eno (El Dorado Hills, CA); Samuel E. Bradshaw (Sacramento, CA)
Assignee: MICRON TECHNOLOGY, INC.
G06F12/0246G06F3/061G06F3/0659G06F3/0679G06F13/1642G11C16/349G06F2212/1036G06F2212/7211
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Quick Facts
Patent No.
US 10,810,119
App. No.
16/138,867
Granted
Oct 20, 2020
Kind
B2
Abstract

A process for wear-leveling in a memory subsystem where references to invalidated chunks and a write count for each of the invalidated chunks of a memory subsystem are received by a wear-leveling manager. The wear-leveling manager orders the received references to the invalidated chunks of the memory subsystem in a tracking structure based on the write count of each of the invalidated chunks, and provides a reference to at least one of the invalidated chunks based on the ordering from the tracking structure to a write scheduler to service a write request, wherein the memory subsystem is wear-leveled by biasing the order of the invalidated chunks to prioritize low write count chunks.

Claims (37)

1. A computer-implemented method comprising:

receiving references to invalidated chunks and a write count for each of the invalidated chunks of a memory subsystem, where invalidated chunks are units of memory that are invalid;

ordering the received references to the invalidated chunks of the memory subsystem in a tracking structure based on the write count of each of the invalidated chunks; and

providing a reference to at least one of the invalidated chunks based on the ordering from the tracking structure to a write scheduler to service a write request from a host system, wherein the memory subsystem is wear-leveled by biasing the order of the invalidated chunks to prioritize low write count chunks.

2. The computer-implemented method of claim 1 , wherein at least a portion of the invalidated chunks are invalidated when overwritten by the write scheduler.

3. The computer-implemented method of claim 1 , wherein at least a portion of the invalidated chunks are invalidated by a scrubber function in response to the scrubber function identifying that the chunks have a low write count.

4. The computer-implemented method of claim 1 , further comprising:

determining a codeword type for each of the invalidated chunks, wherein the ordering is based on the codeword type to avoid a partition write collision.

5. The computer-implemented method of claim 4 , wherein the invalidated chunks are organized into a cartridge that is a set of invalidated chunks ordered by codeword type, the cartridge to be utilized as a unit for writes requests to avoid partition write collision between the invalidated chunks in the cartridge.

6. The computer-implemented method of claim 1 , further comprising:

categorizing and storing references to invalidated chunks into separate groups of references to invalidated chunks in the tracking structure, the separate groups of references to invalidated chunks including a high write count group and a low write count group.

7. The computer-implemented method of claim 6 , further comprising:

selecting from the separate groups of references to invalidated chunks in the tracking structure using a distribution algorithm that biases toward selection from the low write count group.

8. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:

receive managed units invalidated by a write scheduler and a garbage collection process along with a write count for each managed unit, where managed units are units that are a minimum atomic write granularity for a memory subsystem;

order references to the managed units into a tracking structure based on a write count of invalidated managed units to implement a wear-leveling process by biasing the order of the managed units to provide low write count managed units in response to write requests; and

returning at least one of the references according to the ordering to a write scheduler to service write requests from a host system.

9. The non-transitory computer-readable storage medium of claim 8 , having further instructions that, when executed by the processing device, cause the processing device to:

categorize the invalidated managed units that are overwritten by the write scheduler based on write count.

10. The non-transitory computer-readable storage medium of claim 8 , having further instructions that, when executed by the processing device, cause the processing device to:

invalidate managed units by a scrubber of the garbage collection process based on write count.

11. The non-transitory computer-readable storage medium of claim 8 , having further instructions that, when executed by the processing device, cause the processing device to:

determine a codeword type for each of the managed units, wherein the order is based on the codeword type to avoid a partition write collision.

12. The non-transitory computer-readable storage medium of claim 11 , wherein the managed units are organized into a cartridge that is a set of managed units ordered by codeword type, the cartridge to be utilized as a unit for writes of managed units and to avoid partition write collision between the managed units.

13. The non-transitory computer-readable storage medium of claim 8 , having further instructions that, when executed by the processing device, cause the processing device to:

store references for managed units with a high write count in a first queue in the tracking structure, and managed units with a low count in a second queue in the tracking structure.

14. The non-transitory computer-readable storage medium of claim 13 , having further instructions that, when executed by the processing device, cause the processing device to:

select the first queue or the second queue using a distribution algorithm that biases toward selection from the second queue to provide the managed units to the write scheduler.

15. A system comprising:

a plurality of memory components; and

a processing device, operatively coupled with the plurality of memory components, to execute a wear-leveling manager to categorize invalidated managed units by write count where the managed units are a minimum atomic write granularity for the plurality of memory components, to order references to the managed units in a tracking structure based on write count, and to provide the ordered references to the managed units to a write scheduler in response to a write request from a host system.

16. The system of claim 15 , wherein the wear-leveling manager is further to receive the references to the invalidated managed units that are overwritten by the write scheduler, the references to the invalidated managed units to be categorized and ordered by write count.

17. The system of claim 15 , wherein the wear-leveling manager is further to invalidate managed units by a scrubber function where the managed units are selected based on a low write count.

18. The system of claim 15 , further comprising:

a cartridge manager to determine a codeword type for each of the managed units, wherein the ordering is based on the codeword type to avoid a partition write collision.

19. The system of claim 18 , wherein the cartridge manager organizes managed units into a cartridge that is a set of managed units ordered by codeword type, the cartridge to be utilized as a unit for writes of managed units and to avoid partition write collision between the managed units.

20. The system of claim 15 , wherein the wear leveler is further to select a first queue or second queue in the tracking structure using a distribution algorithm that biases toward selection from the second queue to provide the managed units to the write scheduler.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051041/0317 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050724/0392 →
SUPPLEMENT NO. 12 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048948/0677 →
SUPPLEMENT NO. 3 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048951/0902 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2018
From: ENO, JUSTIN; BRADSHAW, SAMUEL E.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046952/0039 →
Continuity (1)
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