IP Library Granted Patent US 10,720,550
Granted Patent B2
US 10,720,550 · App. 16/138,985 · Granted Jul 21, 2020

Light emitting diode and method of fabricating the same

Inventors: Cheng Meng (Xiamen, CN); Chun-Yi Wu (Xiamen, CN); Shufan Yang (Xiamen, CN); Duxiang Wang (Xiamen, CN)
Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
H01L33/22H01L33/38H01L33/387H01L33/405H01L33/30H01L33/44H01L2933/0016H01L2933/0058H01L2933/0066
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Quick Facts
Patent No.
US 10,720,550
App. No.
16/138,985
Granted
Jul 21, 2020
Kind
B2
Abstract

A method of fabricating an LED includes: providing an epitaxial structure having a growth substrate, a first-type semiconductor layer, an active layer and a second-type semiconductor layer; forming an extended electrode and performing thermal treatment to form ohmic contact with the second-type semiconductor layer; providing a temporary substrate bonded with the epitaxial structure, and removing the growth substrate to expose the surface of the first-type semiconductor layer; forming an ohmic contact layer, a mirror layer and a bonding layer over the exposed surface of the first-type semiconductor layer; providing a conductive substrate bonded with the bonding layer, and removing the temporary substrate to expose part of the surface of the second-type semiconductor layer and the extended electrode; forming a roughening surface via etching of the exposed second-type semiconductor layer; and providing a bonding wire electrode forming a closed loop with the extended electrode.

Claims (23)

1. A fabrication method of a light-emitting diode, the method comprising:

(1) providing an epitaxial structure including a growth substrate, a first-type semiconductor layer, an active layer and a second-type semiconductor layer;

(2) forming an extended electrode over a surface of the second-type semiconductor layer and performing thermal treatment to form ohmic contact with the second-type semiconductor layer;

(3) providing a temporary substrate bonded with the epitaxial structure, and removing the growth substrate to expose a surface of the first-type semiconductor layer;

(4) forming an ohmic contact layer, a mirror layer and a bonding layer over the exposed surface of the first-type semiconductor layer;

(5) providing a conductive substrate bonded with the bonding layer, and removing the temporary substrate to expose a portion of the surface of the second-type semiconductor layer and the extended electrode;

(6) forming a roughening surface via etching of the exposed second-type semiconductor layer; and

(7) forming a bonding pad electrode over the surface of the second-type semiconductor layer,

wherein the bonding pad electrode forms a closed loop with the extended electrode;

wherein the extended electrode is formed prior to the forming the roughening surface via etching in step (6), and the bonding pad electrode is formed after the roughening surface via etching in step (6), to thereby avoid forming a magnetic field resulting from the closed loop causing charged particles in a roughening solution to drift during the roughening.

2. The fabrication method of claim 1 , wherein:

a metal mask layer is formed above or below the extended electrode in step (2);

area of the metal mask layer is larger than that of the extended electrode.

3. The fabrication method of claim 2 , wherein a thickness of the metal mask layer formed in step (2) is 10-200 nm.

4. The fabrication method of claim 2 , wherein an edge of the metal mask layer formed in step (2) extends beyond an edge of the extended electrode by at least 2 μm.

5. The fabrication method of claim 2 , wherein the metal mask layer formed in step (2) is composed of at least one of Au, Cr, Ni, Ti, or Pd.

6. The fabrication method of claim 1 , wherein a thermal treatment temperature in step (2) is above 300° C.

7. The fabrication method of claim 1 , wherein the extended electrode is directly formed as a mask layer in step (6) for the roughening etching of the surface of the second-type semiconductor layer.

8. The fabrication method of claim 1 , wherein a mask layer of photoresist layer is formed in a bonding pad electrode area in step (6) prior to the etching.

9. The fabrication method of claim 1 , wherein:

an insulating layer is formed as a mask layer in a bonding pad electrode area prior to the etching in step (6); and

the bonding pad electrode is directly formed over the insulating layer in step (7).

10. The fabrication method of claim 1 , wherein the etching is chemical etching.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2023
From: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
To: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.
Reel/Frame 065302/0223 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2018
From: MENG, CHENG; WU, CHUN-YI; YANG, SHUFAN; WANG, DUXIANG
To: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 046945/0588 →
Priority Claims (1)
CN 2016 1 1196635 · Dec 22, 2016 · national
Continuity (2)
Continuation PCTCN2017097840 · Aug 17, 2017
Related Publication 20190027648A1 · Jan 24, 2019