Reducing MOSFET body current

1. A bidirectional MOSFET switch having reduced body current, the switch comprising:

a body region that is a semiconductor of a first type separating a source region and a drain region that are a semiconductor of a second type, the body region being connected to a body terminal, the source region being connected to a source terminal, the drain region being connected to a drain terminal, and the body terminal being shorted to the source terminal;

a buried layer that is a semiconductor of the second type separating the body region from a substrate that is a semiconductor of the first type, the buried layer being coupled to a buried layer terminal;

a gate terminal drivable to form a channel in the body region, thereby enabling conduction between the source terminal and the drain terminal; and

a configuration switch configured to connect the body terminal to the buried layer terminal when the source terminal voltage exceeds the drain terminal voltage.

2. The switch of claim 1 , wherein the first type of semiconductor is N-type, and the second type of semiconductor is P-type.

3. The switch of claim 1 , wherein the first type of semiconductor is P-type, and the second type of semiconductor is N-type.

4. The switch of claim 3 , wherein the configuration switch is configured to connect the body terminal to the buried layer terminal when the source terminal voltage exceeds the drain terminal voltage unless the gate terminal is de-asserted.

5. The switch of claim 4 , wherein the configuration switch is configured to disconnect the body terminal from the buried layer terminal when the drain terminal voltage exceeds the source terminal voltage or the gate terminal is de-asserted.

6. The switch of claim 3 , wherein the configuration switch is configured to disconnect the body terminal from the buried layer terminal when the drain terminal voltage exceeds the source terminal voltage.

7. The switch of claim 6 , wherein the buried layer floats while disconnected by the configuration switch.

8. The switch of claim 3 , wherein the configuration switch comprises an NMOS transistor.

9. The switch of claim 8 , wherein the configuration switch has a body terminal coupled to the MOSFET switch's source terminal regardless of whether the source terminal voltage exceeds the drain terminal voltage.

10. The switch of claim 1 , further comprising a switch controller configured to drive the configuration switch based at least in part on the drain terminal voltage and the source terminal voltage.

11. The switch of claim 10 , wherein the switch controller's driving of the configuration switch is further based on whether the gate terminal is asserted.

12. A bidirectional MOSFET switch having reduced body current, the switch comprising:

a body region that is a semiconductor of a first type separating a source region and a drain region that are a semiconductor of a second type, the body region being connected to a body terminal, the source region being connected to a source terminal, and the drain region being connected to a drain terminal;

a buried layer that is a semiconductor of the second type separating the body region from a substrate that is a semiconductor of the first type, the buried layer being coupled to a buried layer terminal;

a gate terminal drivable to form a channel in the body region, thereby enabling conduction between the source terminal and the drain terminal; and

a configuration switch configured to connect the body terminal to the buried layer terminal when the source terminal voltage exceeds the drain terminal voltage, the configuration switch comprising an anti-series pair of MOSFETs.

13. A method of manufacturing a bidirectional MOSFET switch having reduced body current, the method comprising:

creating an n-type buried layer underlying a p-type body region;

forming in the body region an n-type source region and an n-type drain region;

connecting a buried layer terminal to the buried layer, a body terminal to the body region, a source terminal to the source region, and a drain terminal to the drain region, the body terminal being shorted to the source terminal;

providing a gate terminal that is drivable to form a channel in the body region, thereby enabling conduction between the source terminal and the drain terminal; and

coupling a configuration switch between the body terminal and buried layer terminal, the configuration switch being configured to connect the body terminal to the buried layer terminal when the source terminal voltage exceeds the drain terminal voltage.

14. The method of claim 13 , wherein the configuration switch is configured to connect the body terminal to the buried layer terminal when the source terminal voltage exceeds the drain terminal voltage unless the gate terminal is de-asserted; and wherein the configuration switch is configured to disconnect the body terminal from the buried layer terminal when the drain terminal voltage exceeds the source terminal voltage or the gate terminal is de-asserted.

15. The method of claim 13 , wherein the configuration switch is configured to disconnect the body terminal from the buried layer terminal when the drain terminal voltage exceeds the source terminal voltage.

16. The method of claim 13 , wherein the buried layer floats while disconnected by the configuration switch.

17. The method of claim 13 , wherein the configuration switch comprises an NMOS transistor, and the method further comprises connecting the source terminal to a body region of the configuration switch.

18. The method of claim 13 , further comprising: furnishing the switch with a controller configured to drive the configuration switch based at least in part on the drain terminal voltage and the source terminal voltage.

19. The method of claim 18 , wherein the controller's driving of the configuration switch is further based on whether the gate terminal is asserted.