IP Library Granted Patent US 10,741,759
Granted Patent B2
US 10,741,759 · App. 16/142,310 · Granted Aug 11, 2020

Diffusive memristor and device for synaptic emulator

Inventors: Jianhua Yang (Hadley, MA); Qiangfei Xia (Amherst, MA); Mark McLean (Severna Park, MD); Qing Wu (Manilus, NY); Mark Barnell (Clay, NY)
Assignee: University of Massachusetts
H01L45/1266H01L45/085H01L45/1233H01L45/1253H01L45/145H01L45/146
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Quick Facts
Patent No.
US 10,741,759
App. No.
16/142,310
Granted
Aug 11, 2020
Kind
B2
Abstract

A diffusive memristor device and an electronic device for emulating a biological synapse are disclosed. The diffusive memristor device includes a bottom electrode, a top electrode formed opposite the bottom electrode, and a dielectric layer disposed between the top electrode and the bottom electrode. The dielectric layer comprises silver doped silicon oxynitride (SiO x N y :Ag). In an alternate implementation, the dielectric layer comprises silver doped silicon oxide (Ag:SiO 2 ). An electronic synapse emulation device is also disclosed. The synapse emulation device includes a diffusive memristor device, a drift memristor device connected in series with the diffusive memristor device, a first voltage pulse generator connected to the diffusive memristor device, and a second voltage pulse generator connected to the drift memristor device. Application of a signal from one of the first voltage pulse generator or the second voltage pulse generator allows the synapse emulation device to exhibit long-term plasticity.

Claims (37)

1. A diffusive memristor device, comprising:

a bottom electrode;

a top electrode formed opposite the bottom electrode; and

a dielectric layer disposed between the top electrode and the bottom electrode, the dielectric layer comprising silver doped silicon oxynitride (SiO x N y :Ag).

2. The diffusive memristor device of claim 1 , wherein the bottom electrode comprises one of a platinum layer or a gold layer.

3. The diffusive memristor device of claim 1 , wherein the top electrode comprises one of a platinum layer or a gold layer.

4. The diffusive memristor device of claim 1 , wherein the dielectric layer comprises silver nanoparticles disposed within the silicon oxynitride.

5. The diffusive memristor device of claim 1 , wherein the diffusive memristor device is formed on a substrate.

6. The diffusive memristor device of claim 5 , wherein the substrate includes a silicon oxide layer.

7. The diffusive memristor device of claim 5 , wherein a titanium layer is deposited on a surface of the substrate, the titanium layer generating an adhesion surface for the bottom electrode.

8. A synapse emulation device, comprising:

a diffusive memristor device that includes a switching layer comprising a dielectric insulating layer and nanoclusters of a diffusive metal dispersed within the dielectric insulating layer;

a drift memristor device connected in series with the diffusive memristor device;

a first voltage pulse generator connected to the diffusive memristor device; and

a second voltage pulse generator connected to the drift memristor device,

wherein the diffusive memristor device exhibits plasticity upon application of a signal from one of the first voltage pulse generator or the second voltage pulse generator to the synapse emulation device.

9. The synapse emulation device of claim 8 , wherein a long low-voltage pulse turns the diffusive memristor device on.

10. The synapse emulation device of claim 8 , wherein a short high-voltage pulse switches on the drift memristor device.

11. The synapse emulation device of claim 8 , wherein the diffusive memristor device is a silver doped silicon oxynitride (SiO x N y :Ag) based diffusive memristor.

12. The synapse emulation device of claim 8 , wherein the drift memristor device is a tantalum oxide (TaO x ) based drift memristor.

13. The synapse emulation device of claim 8 , wherein the diffusive memristor device comprises:

a bottom electrode; and

a top electrode formed opposite the bottom electrode,

wherein the switching layer is disposed between the top electrode and the bottom electrode, and the dielectric insulating layer comprises silver doped silicon oxynitride (SiO x N y :Ag).

14. The synapse emulation device of claim 13 , wherein the bottom electrode of the diffusive memristor device comprises one of a platinum layer or a gold layer.

15. The synapse emulation device of claim 13 , wherein the top electrode of the diffusive memristor device comprises one of a platinum layer or a gold layer.

16. The synapse emulation device of claim 13 , wherein the nanoclusters of the diffusive metal dispersed within the dielectric insulating layer comprise silver nanoparticles disposed within the silicon oxynitride.

17. The synapse emulation device of claim 13 , wherein the diffusive memristor device is formed on a substrate.

18. The synapse emulation device of claim 17 , wherein the substrate includes a silicon oxide layer.

19. The synapse emulation device of claim 17 , wherein a titanium layer is deposited on a surface of the substrate, the titanium layer generating an adhesion surface for the bottom electrode.

20. A diffusive memristor device, comprising:

a bottom metal electrode;

a top metal electrode formed opposite the bottom metal electrode; and

a dielectric layer disposed between the top metal electrode and the bottom metal electrode, the dielectric layer comprising a combination of (i) a diffusive metal and (ii) one of an oxide, an oxynitride, or a nitride,

wherein nanoclusters of the diffusive metal are formed within the dielectric layer.

21. The diffusive memristor device of claim 20 , wherein the diffusive metal includes one of silver (Ag) or copper (Cu).

22. The diffusive memristor device of claim 20 , wherein the oxide includes silicon oxide (SiO 2 ), and wherein the oxynitride includes silicon oxynitride (SiN y O x ).

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 16, 2024
From: YANG, JIANHUA; XIA, QIANGFEI
To: UNIVERSITY OF MASSACHUSETTS
Reel/Frame 066318/0632 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2022
From: MCLEAN, MARK R.
To: GOVERNMENT OF THE UNITED STATES AS REPRESENTED BY THE DIRECTOR, NATIONAL SECURITY AGENCY
Reel/Frame 059221/0441 →
Continuity (2)
Provisional Application 62563620 · Sep 26, 2017
Related Publication 20200227635A1 · Jul 16, 2020
Cited By (1)
US 12,333,275