IP Library › Granted Patent US 10,915,640
Granted Patent B2
US 10,915,640 · App. 16/148,092 · Granted Feb 9, 2021

Cyber security testing for authorized services

Inventors: Michael P. Kasper (Poughkeepsie, NY); Bryan Childs (Poughkeepsie, NY); Kin Choi (Poughkeepsie, NY); Karl D. Schmitz (Poughkeepsie, NY); Kathryn Voss (New Paltz, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
G06F21/577G06F2221/034
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,915,640
App. No.
16/148,092
Granted
Feb 9, 2021
Kind
B2
Abstract

A system includes a memory system and a processing system operably coupled to the memory system. The processing system is configured to perform operations including setting a target register to point to a first protected storage location of the memory system resulting in a protection exception upon access, calling an authorized service, and confirming that the authorized service uses the target register based on detecting the protection exception. The target register is adjusted to point to a parameter list including one or more known values and a pointer to a second protected storage location resulting in the protection exception upon access to confirm use of a value of the parameter list responsive to calling the authorized service. Parameter list testing and target register testing is repeated for locations in the parameter list and target registers to construct a testing profile for vulnerability testing of the authorized service.

Claims (48)

1. A system comprising:

a memory system; and

a processing system operably coupled to the memory system, the processing system configured to perform a plurality of operations comprising:

setting a target register to point to a first protected storage location of the memory system resulting in a protection exception upon access;

calling an authorized service;

confirming that the authorized service uses the target register as a first address parameter based on detecting the protection exception matching the first protected storage location responsive to calling the authorized service;

adjusting the target register to point to a parameter list comprising one or more known values and a pointer to a second protected storage location of the memory system resulting in the protection exception upon access based on confirming that the authorized service uses the target register;

confirming that the authorized service uses a value of the parameter list comprising the pointer as a second address parameter based on detecting the protection exception matching the second protected storage location responsive to calling the authorized service; and

repeating parameter list testing and target register testing for a plurality of locations in the parameter list and a plurality of target registers to construct a testing profile for vulnerability testing of the authorized service.

2. The system of claim 1 , wherein the processing system is further configured to perform operations comprising:

setting one or more other registers of the plurality of target registers to one or more known values.

3. The system of claim 1 , wherein the processing system is further configured to perform operations comprising:

performing parameter list depth testing progressively through a plurality of nested levels of parameter areas.

4. The system of claim 3 , wherein the parameter list depth testing is limited to a maximum depth.

5. The system of claim 1 , wherein the one or more known values in the parameter list comprise one or more valid parameter addresses.

6. The system of claim 1 , wherein the one or more known values in the parameter list comprise one or more numeric function codes.

7. The system of claim 1 , wherein the one or more known values in the parameter list comprise one or more bit patterns.

8. The system of claim 1 , wherein the processing system is further configured to perform operations comprising:

cycling the target register through a plurality of test patterns.

9. A method comprising:

setting a target register to point to a first protected storage location of a memory system resulting in a protection exception upon access;

calling an authorized service;

confirming that the authorized service uses the target register as a first address parameter based on detecting the protection exception matching the first protected storage location responsive to calling the authorized service;

adjusting the target register to point to a parameter list comprising one or more known values and a pointer to a second protected storage location of the memory system resulting in the protection exception upon access based on confirming that the authorized service uses the target register;

confirming that the authorized service uses a value of the parameter list comprising the pointer as a second address parameter based on detecting the protection exception matching the second protected storage location responsive to calling the authorized service; and

repeating parameter list testing and target register testing for a plurality of locations in the parameter list and a plurality of target registers to construct a testing profile for vulnerability testing of the authorized service.

10. The method of claim 9 , further comprising:

setting one or more other registers of the plurality of target registers to one or more known values.

11. The method of claim 9 , further comprising:

performing parameter list depth testing progressively through a plurality of nested levels of parameter areas.

12. The method of claim 11 , wherein the parameter list depth testing is limited to a maximum depth.

13. The method of claim 9 , wherein the one or more known values in the parameter list comprise one or more valid parameter addresses.

14. The method of claim 9 , wherein the one or more known values in the parameter list comprise one or more numeric function codes.

15. The method of claim 9 , wherein the one or more known values in the parameter list comprise one or more bit patterns.

16. The method of claim 9 , further comprising:

cycling the target register through a plurality of test patterns.

17. A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processing system to perform a plurality of operations comprising:

setting a target register to point to a first protected storage location of a memory system resulting in a protection exception upon access;

calling an authorized service;

confirming that the authorized service uses the target register as a first address parameter based on detecting the protection exception matching the first protected storage location responsive to calling the authorized service;

adjusting the target register to point to a parameter list comprising one or more known values and a pointer to a second protected storage location of the memory system resulting in the protection exception upon access based on confirming that the authorized service uses the target register;

confirming that the authorized service uses a value of the parameter list comprising the pointer as a second address parameter based on detecting the protection exception matching the second protected storage location responsive to calling the authorized service; and

repeating parameter list testing and target register testing for a plurality of locations in the parameter list and a plurality of target registers to construct a testing profile for vulnerability testing of the authorized service.

18. The computer program product of claim 17 , wherein the program instructions executable by the processing system are further configured to perform operations comprising:

setting one or more other registers of the plurality of target registers to one or more known values.

19. The computer program product of claim 17 , wherein the program instructions executable by the processing system are further configured to perform operations comprising:

performing parameter list depth testing progressively through a plurality of nested levels of parameter areas.

20. The computer program product of claim 17 , wherein the one or more known values in the parameter list comprise: one or more valid parameter addresses, one or more numeric function codes, and/or one or more bit patterns, with relevant function codes and/or bit patterns determined by detecting differences in a failing instruction address when the function code or the bit pattern was changed, one increment or one bit at a time.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 1, 2018
From: KASPER, MICHAEL P.; CHILDS, BRYAN; CHOI, KIN; SCHMITZ, KARL D.; VOSS, KATHRYN
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 047018/0888 →
Continuity (1)
Related Publication 20200104507A1 · Apr 2, 2020
Cited By (2)
US 12,254,094 US 12,361,137