Data erasure in memory sub-systems

1. A memory system comprising:

a memory component comprising a plurality of blocks; and

a processing device programmed to perform operations comprising:

receiving a sanitize command for the plurality of blocks, wherein a first portion of the plurality of blocks are retired and a second portion of the plurality of blocks are unretired;

initiating a first erase cycle at a first retired block of the plurality of blocks;

determining that the first erase cycle was successful;

initiating a second erase cycle at a second retired block of the plurality of blocks;

determining that the second erase cycle was not successful; and

setting an erase indicator to false.

2. The memory system of claim 1 , wherein the processing device is further programmed to perform operations comprising deleting at least one cryptographic key for decrypting data stored at the first retired block.

3. The memory system of claim 1 , wherein the processing device is further programmed to perform operations comprising:

sending to the memory component a first erase command directed to the first retired block;

receiving, from the memory component, a status indicator indicating that the first erase command was unsuccessful.

4. The memory system of claim 1 , wherein the processing device is further programmed to perform operations comprising:

determining that all the blocks of the second portion are erased; and

setting an unretired block erase indicator to true.

5. The memory system of claim 1 , wherein the processing device is further programmed to perform operations comprising:

reading the first retired block; and

determining that the reading of the first retired block was successful.

6. The memory system of claim 1 , further comprising storing to the memory system an indication that the first retired block is retired.

7. The memory system f claim 1 , wherein the processing device is further programmed to perform operations comprising:

determining that a third block of the plurality of blocks failed to erase;

reading the third block; and

determining that the reading of the third block was unsuccessful.

8. The memory system of claim 1 , wherein the processing device is further programmed to perform operations comprising:

receiving, from a host device, a request to read the erase indicator; and

sending, to the host device, an indication of the erase indicator.

9. A method comprising:

receiving a sanitize operation for a plurality of blocks, wherein a first portion of the plurality of blocks are retired and a second portion of the plurality of blocks are unretired;

initiating a first erase cycle at a first retired block of the plurality of blocks;

determining that the first erase cycle was successful;

initiating a second erase cycle at a second retired block of the plurality of blocks;

determining that the second erase cycle was not successful; and

setting an erase indicator to false.

10. The method of claim 9 , further comprising deleting at least one cryptographic key for decrypting data stored at the first retired block.

11. The method of claim 9 , further comprising:

sending to a memory component comprising the first retired block a first erase command directed to the first retired block; and

receiving, from the memory system, a status indicator indicating that the first erase command was unsuccessful.

12. The method of claim 9 , further determining that all the blocks of the second portion are erased; and

setting an unretired block erase indicator to true.

13. The method of claim 9 , further comprising:

reading the first retired block; and

determining that the reading of the first retired block was successful.

14. The method of claim 9 , further comprising storing to the memory system an indication that the first retired block is retired.

15. The method of claim 9 , further comprising:

determining that a second block of the plurality of blocks failed to erase;

reading the second block; and

determining that the reading of the second block was unsuccessful.

16. The method of claim 9 , further comprising:

receiving, from a host device, a request to read the erase indicator; and

sending, to the host device, an indication of the erase indicator.

17. A non-transitory machine-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

receiving a sanitize operation for a plurality of blocks, wherein a first portion of the plurality of blocks are retired and a second portion of the plurality of blocks are unretired;

initiating a first erase cycle at a first retired block of the plurality of blocks;

determining that the first erase cycle was successful;

initiating a second erase cycle at a second retired block of the plurality of blocks;

determining that the second erase cycle was not successful; and

setting an erase indicator to false.

18. The non-transitory machine-readable storage medium of claim 17 , further comprising instructions that, when executed by the processing device, cause the processing device to perform operations comprising deleting at least one cryptographic key for decrypting data stored at the first retired block.

19. The non-transitory machine-readable storage medium of claim 17 , further comprising instructions that, when executed by the processing device, cause the processing device to perform operations comprising:

sending to a memory component comprising the first retired block a first erase command directed to the first retired block; and

receiving, from the memory component, a status indicator indicating that the first erase command was unsuccessful.

20. The non-transitory machine-readable storage medium of claim 17 , further comprising instructions that, when executed by the processing device, cause the processing device to perform operations comprising:

determining that all the blocks of the second portion are erased; and

setting an unretired block erase indicator to true.