Resistive memory device with meshed electrodes
A method is presented for incorporating a resistive random access memory (RRAM) stack within a resistive memory crossbar array. The method includes forming a conductive line within an interlayer dielectric (ILD), constructing a barrier layer over a portion of the conductive line, forming a bottom meshed electrode, depositing a dielectric layer over the bottom meshed electrode, and forming a top meshed electrode over the dielectric layer, where each of the top and bottom meshed electrodes includes a plurality of isolations films.
1. A method for incorporating a resistive random access memory (RRAM) stack within a resistive memory crossbar array, the method comprising:
forming a conductive line within an interlayer dielectric (ILD);
constructing a barrier layer over a portion of the conductive line;
forming a bottom meshed electrode;
depositing a dielectric layer over the bottom meshed electrode; and
forming a top meshed electrode over the dielectric layer, where each of the top and bottom meshed electrodes includes a plurality of isolations films.
2. The method of claim 1 , further comprising forming a metal layer over the top meshed electrode.
3. The method of claim 2 , further comprising forming a hardmask over the metal layer.
4. The method of claim 3 , wherein the bottom meshed electrode, the dielectric layer, the top meshed electrode, the metal layer, and the hardmask define the RRAM stack.
5. The method of claim 4 , further comprising forming spacers adjacent the RRAM stack.
6. The method of claim 1 , wherein the top and bottom meshed electrodes are formed from a same material.
7. The method of claim 6 , wherein the same material is titanium oxynitride (TiON).
8. The method of claim 7 , wherein the plurality of isolation films are formed from silicon nitride (SiN).
9. The method of claim 8 , wherein the plurality of isolation films of the bottom meshed electrode are perpendicular to the plurality of isolation films of the top meshed electrode.
10. The method of claim 1 , wherein the barrier layer is a tantalum nitride (TaN) layer and the conductive line is a copper (Cu) line.
11. A method for incorporating a resistive random access memory (RRAM) stack within a resistive memory crossbar array, the method comprising:
forming a conductive line within an interlayer dielectric (ILD);
forming the RRAM stack over the conductive line, the RRAM stack constructed by:
forming a bottom meshed electrode;
depositing a dielectric layer over the bottom meshed electrode; and
forming a top meshed electrode over the dielectric layer, where each of the top and bottom meshed electrodes includes a plurality of isolations films.
12. The method of claim 11 , wherein the RRAM stack further includes a metal layer over the top meshed electrode.
13. The method of claim 12 , wherein the RRAM stack further includes a hardmask over the metal layer.
14. The method of claim 13 , further comprising forming spacers adjacent the RRAM stack.
15. The method of claim 11 , wherein the top and bottom meshed electrodes are formed from a same material.
16. The method of claim 15 , wherein the same material is titanium oxynitride (TiON).
17. The method of claim 16 , wherein the plurality of isolation films are formed from silicon nitride (SiN).
18. The method of claim 17 , wherein the plurality of isolation films of the bottom meshed electrode are perpendicular to the plurality of isolation films of the top meshed electrode.