Methods for automated hardware system synthesis
Described is a method comprising a processing, an establishing, and/or a determining. In the processing, an inputted capabilities list including one or more hardware design capabilities may be processed. In the establishing, one or more candidate components for the one or more hardware design capabilities may be established. In the determining, a set of unique candidate netlists capable of satisfying the one or more hardware design capabilities may be determined, the set of unique candidate netlists being based upon the set of candidate components.
1. A method comprising:
processing an inputted system capabilities list including one or more hardware design capabilities;
establishing one or more candidate components for the one or more hardware design capabilities; and
determining a set of unique candidate netlists capable of satisfying the one or more hardware design capabilities, the set of unique candidate netlists being based upon the set of candidate components, wherein the unique candidate netlists incorporate components interconnected via a programmable silicon interposer, wherein the programmable silicon interposer includes an integrated circuit.
2. The method of claim 1 ,
wherein the inputted capabilities list comprises a sensor.
3. The method of claim 1 ,
wherein the one or more candidate components include a microprocessor.
4. The method of claim 1 ,
wherein the establishing is to include one or more predetermined components, and
wherein the unique candidate netlists include the one or more predetermined components.
5. The method of claim 4 ,
wherein the one or more predetermined components include a microprocessor.
6. The method of claim 1 ,
wherein the one or more candidate components support at least one communication protocol.
7. The method of claim 1 , comprising:
analyzing the set of unique candidate netlists based upon one or more solution space constraints to produce a corresponding set of rankings for the set of unique candidate netlists.
8. The method of claim 7 ,
wherein the solution space constraints include at least one of: a size constraint, a power constraint, a cost constraint, or a preferred-component constraint.
9. The method of claim 8 , comprising:
verifying the set of unique candidate netlists against one or more rule-sets.
10. The method of claim 9 ,
wherein the one or more rule-sets include at least one of: an Electrical Rule Check (ERC) rule-set; or a Design Rule Check (DRC) rule-set.
11. The method of claim 1 comprising ranking the unique candidate netlists based on user preference, cost, risk, size and/or power.
12. The method of claim 1 comprising:
identifying a set of possible combination of I2C based components associated with the one or more candidate components;
identifying a set of possible configuration of SPI based components associated with the one or more candidate components; and
performing cross-product of the identified set of possible combination of the I2C based components and the identified set of possible configuration of the SPI based components.
13. The method of claim 1 comprising:
identifying entry of a new component into a table, wherein the new component is in addition to the one or more candidate components; and
building one or more unique systems in response to identifying entry of the new component.
14. A method comprising:
processing an inputted capabilities list including one or more hardware design capabilities;
processing an inputted set of system information including one or more candidate components for the one or more hardware design capabilities and one or more solution space constraints;
determining a set of unique candidate netlists capable of satisfying the one or more hardware design capabilities, the set of unique candidate netlists being based upon the set of candidate components; and
analyzing the set of unique candidate netlists based upon the one or more solution space constraints to produce a corresponding set of rankings for the set of unique candidate netlists,
wherein the unique candidate netlists incorporate components interconnected via a programmable silicon interposer, wherein the programmable silicon interposer includes an integrated circuit.
15. The method of claim 14 ,
wherein the processing the input set is to include one or more predetermined components, and
wherein the unique candidate netlists include the one or more predetermined components.
16. The method of claim 14 ,
wherein the one or more candidate components support at least one communication protocol.
17. The method of claim 14 , comprising:
verifying the set of unique candidate netlists against one or more rule-sets.
18. Machine readable storage medium having machine executable instructions stored thereon that, when executed, cause one or more processors to perform an operation comprising:
processing an inputted capabilities list including one or more hardware design capabilities;
establishing one or more candidate components for the one or more hardware design capabilities; and
determining a set of unique candidate netlists capable of satisfying the one or more hardware design capabilities, the set of unique candidate netlists being based upon the set of candidate components,
wherein the unique candidate netlists incorporate components interconnected via a programmable silicon interposer, wherein the programmable silicon interposer includes an integrated circuit.
19. The machine readable storage medium of claim 18 ,
wherein the establishing is to include one or more predetermined components, and
wherein the unique candidate netlists include the one or more predetermined components.
20. The machine readable storage medium of claim 18 , the operation further comprising:
analyzing the set of unique candidate netlists based upon one or more solution space constraints to produce a corresponding set of rankings for the set of unique candidate netlists.
21. The machine readable storage medium of claim 18 ,
wherein the components interconnected via the silicon interposer are for mounting to the silicon interposer.