Additive manufactured 3D electronic substrate

1. A method of forming electronic substrates and assemblies, the method comprising:

co-depositing a first material and a second material to form a first layer, wherein the first material is an electrically insulative material and the second material is an electrically conductive material, wherein the first material and the second material are co-deposited as powders, binders, slurries, inks, or any combination of the powders, binders, slurries and inks to form the first layer;

sintering or curing the first layer of co-deposited materials;

co-depositing the first material and the second material to form a second layer wherein the first material and the second material of the second layer are co-deposited as powders, binders, slurries, inks, or any combination of the powders, binders, slurries and inks to form the second layer, and wherein the second layer is co-deposited on top of the sintered or cured first layer of co-deposited materials;

sintering or curing the second layer of co-deposited materials; and

retrieving a solid electronic substrate wherein within each layer the first layer, the first material of the first layer is deposited and sintered or cured at positions having x, y, and z coordinates that are discrete from positions having different x, y, and z coordinates where the second material of the first layer is deposited and sintered or cured, wherein the first material and the second material of the first layer are sintered or cured together after the first material and the second material of the first layer are deposited, and wherein the sintered or cured first material of the first layer forms the electronic substrate and the sintered or cured second material of the first layer forms a feature in or on the electronic substrate.

2. The method of claim 1 , wherein the first material and the second material of the first layer include a mixture of at least two powders, binders, slurries, or inks having different melting points, and wherein the sintering of the first layer includes transient liquid-phase sintering.

3. The method of claim 1 , wherein the electronic substrate is in a shape of a regular or irregular polygon, cylinder, cone, sphere, or torus.

4. The method of claim 1 , wherein the electronic substrate includes at least one feature positioned on at least three sides of the electronic substrate.

5. The method of claim 1 , wherein the second material of the first layer is a conductive material that, when sintered, forms a signal trace in or on the electronic substrate.

6. The method of claim 5 , wherein the second material of the first layer is deposited and sintered to form the signal trace that extends diagonally, curvilinearly, vertically, or combinations of how the signal trace extends on or through the electronic substrate.

7. The method of claim 5 , further comprising, after depositing and sintering the first and second materials of the first layer:

positioning an electronic component on the electronic substrate; and

depositing and sintering a third material to form an electrical interconnection between the electronic component and the signal trace.

8. The method of claim 1 , wherein the second material of the first layer, when sintered, forms a reinforcing boss or a stiffener in or on the electronic substrate.

9. The method of claim 1 , wherein the second material of the first layer includes a conductive material that, when sintered, forms a twisted wire pair, coaxial cable, or other wire.

10. The method of claim 1 , wherein the first material of the first layer is deposited and sintered at positions to form shielding about a twisted wire pair, a coaxial cable, or another wire.

11. The method of claim 1 , wherein the second material of the first layer, when sintered, forms a thermal sensor in or on the electronic substrate, an antenna in or on the electronic substrate, a contact pad in or on the electronic substrate, or a via within the electronic substrate.

12. The method of claim 1 , further comprising depositing and sintering a third material at positions that are discrete from the positions where the first and second materials of the first layer are deposited and sintered, wherein the second material of the first layer, when sintered, forms an inductor core in or on the electronic substrate, and wherein the third material, when sintered, forms wire that is wrapped about the inductor core to form a wrapped inductor core in or on the electronic substrate.

13. The method of claim 1 , wherein the first material and the second material of the first layer include multiple, different powders, binders, slurries, or inks, and wherein the method includes selectively depositing the different powders, binders, slurries, or inks at discrete positions.

14. The method of claim 1 , wherein the solid electronic substrate includes an electronic component in or on the solid electronic substrate, wherein the solid electronic substrate and the electronic component have the same or substantially the same coefficient of thermal expansion.

15. The method of claim 1 , wherein the solid electronic substrate includes an electronic component coupled with the solid electronic substrate via a solder joint between a contact pad on the electronic component and a contact pad on the solid electronic substrate, the method further comprising:

depositing a third material on the contact pad of the electronic component or on the contact pad of the solid electronic substrate;

sintering the third material, wherein the sintered third material forms a surface protrusion on the contact pad; and

soldering between the contact pad of the electronic component and the contact pad of the solid electronic substrate to form the solder joint, wherein the surface protrusion is engaged with the solder joint.

16. The method of claim 1 , further comprising coupling a lid with the solid electronic substrate, wherein a cavity is defined between the lid and the solid electronic substrate, and wherein an electronic component is positioned within the cavity and coupled with the solid electronic substrate.

17. A method comprising:

deploying the solid electronic substrate formed in accordance with claim 1 in a downhole well.

18. The method of claim 1 , wherein the first material of the first layer is a ceramic material.