IP Library Granted Patent US 10,720,446
Granted Patent B2
US 10,720,446 · App. 16/158,039 · Granted Jul 21, 2020

Integrated structures including material containing silicon, nitrogen, and at least one of carbon, oxygen, boron and phosphorus

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Quick Facts
Patent No.
US 10,720,446
App. No.
16/158,039
Granted
Jul 21, 2020
Kind
B2
Abstract

Some embodiments include an integrated structure having vertically-stacked conductive levels alternating with dielectric levels. A layer over the conductive levels includes silicon, nitrogen, and one or more of carbon, oxygen, boron and phosphorus. In some embodiments the vertically-stacked conductive levels are wordline levels within a NAND memory array. Some embodiments include an integrated structure having vertically-stacked conductive levels alternating with dielectric levels. Vertically-stacked NAND memory cells are along the conductive levels within a memory array region. A staircase region is proximate the memory array region. The staircase region has electrical contacts in one-to-one correspondence with the conductive levels. A layer is over the memory array region and over the staircase region. The layer includes silicon, nitrogen, and one or more of carbon, oxygen, boron and phosphorus.

Claims (24)

1. A method of forming an integrated structure, comprising:

forming vertically-stacked NAND wordline levels within a NAND memory array, the wordline levels being vertically separated from one another by intervening dielectric levels that physically contact the wordline levels;

forming a material over the wordline levels and spaced from an uppermost of the wordline levels by an insulative region, the material being in direct physical contact with the insulative region, the material comprising silicon, nitrogen, and one or more substances selected from the group consisting of carbon, oxygen, boron and phosphorus, a total concentration of said one or more substances being present within a range of from about 2 atomic percent to about 20 atomic percent; and

forming at least one opening extending through the material over the wordline levels and through at least some of the wordline levels.

2. The integrated structure of claim 1 wherein said total concentration of the one or more substances is at least about 4 atomic percent.

3. The integrated structure of claim 1 wherein said total concentration of the one or more substances is at least about 10 atomic percent.

4. The integrated structure of claim 1 wherein said total concentration of the one or more substances is within a range of from about 2 atomic percent to about 20 atomic percent.

5. The integrated structure of claim 1 wherein said total concentration of the one or more substances is within a range of from about 6 atomic percent to about 11 atomic percent.

6. A method of forming an integrated structure, comprising:

forming vertically-stacked conductive levels alternating with dielectric levels;

forming vertically-stacked NAND memory cells along the conductive levels within a memory array region;

forming a staircase region proximate the memory array region, the staircase region comprising electrical contacts in one-to-one correspondence with the conductive levels;

forming a material over the memory array region and over the staircase region, the material being separated by an uppermost of the conductive levels by an intervening insulative material, the material being in direct physical contact with the intervening insulative material; the material comprising silicon, nitrogen, and one or more substances selected from the group consisting of carbon, oxygen, boron and phosphorus;

forming an opening within the memory array region extending through the material over the memory array region and through at least some of the vertically-stacked conductive levels; and

forming a channel material within the opening.

7. The method of claim 6 wherein said total concentration of the one or more substances is within a range of from about 6 atomic percent to about 11 atomic percent.

8. The method of claim 6 wherein said one or more substances include carbon.

9. The method of claim 8 wherein the material consists of silicon, nitrogen and carbon.

10. The method of claim 6 wherein said one or more substances include oxygen.

11. The method of claim 10 wherein the material consists of silicon, nitrogen and oxygen.

12. The method of claim 6 wherein said one or more substances include boron.

13. The method of claim 12 wherein the material consists of silicon, nitrogen and boron.

14. The method of claim 6 wherein said one or more substances include phosphorus.

15. The method of claim 14 wherein the material consists of silicon, nitrogen and phosphorus.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051026/0568 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050718/0764 →
SUPPLEMENT NO. 11 TO PATENT SECURITY AGREEMENT Recorded Jan 16, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048082/0860 →
SUPPLEMENT NO. 2 TO PATENT SECURITY AGREEMENT Recorded Jan 16, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048082/0889 →