Methods, articles, and devices for pulse adjustment to program a memory cell

1. A method, comprising:

determining that a resistance value for a memory cell is lower than a previous resistance value for the memory cell;

adjusting a parameter of an electrical pulse based at least in part on determining that the resistance value is lower than the previous resistance value; and

applying the electrical pulse to the memory cell based at least in part on the adjusted parameter.

2. The method of claim 1 , further comprising:

performing a read operation for the memory cell; and

determining the resistance value for the memory cell based at least in part on performing the read operation.

3. The method of claim 2 , further comprising:

programming the memory cell to a reset state; and

determining the resistance value for the memory cell based at least in part on programming the memory cell to the reset state.

4. The method of claim 1 , further comprising:

determining, after applying the electrical pulse, a second resistance value for the memory cell;

determining that the second resistance value is higher than the resistance value;

maintaining the adjusted parameter for the electrical pulse based at least in part on determining that the second resistance value is higher than the resistance value; and

applying a subsequent electrical pulse to the memory cell based at least in part on the adjusted parameter.

5. The method of claim 1 , wherein the parameter of the electrical pulse comprises a fall time of the electrical pulse.

6. The method of claim 1 , further comprising:

detecting a plurality of resistance values for the memory cell on a periodic basis, the plurality of resistance values comprising the resistance value and the previous resistance value.

7. The method of claim 1 , wherein the memory cell comprises a phase change memory (PCM) cell.

8. A method, comprising:

detecting, on a periodic basis, a resistance characteristic associated with one or more memory cells;

determining that a value of the resistance characteristic has changed over a plurality of periods associated with the periodic basis;

adjusting a parameter of a programming electrical pulse based at least in part on determining that the value of the resistance characteristic has changed over the plurality of periods; and

applying, to the one or more memory cells, the programming electrical pulse using the adjusted parameter of the programming electrical pulse.

9. The method of claim 8 , further comprising:

determining a difference between a first value of the resistance characteristic and another value associated with the resistance characteristic; and

adjusting the parameter of the programming electrical pulse based on the difference.

10. The method of claim 9 , wherein the other value is a previous value of the resistance characteristic.

11. The method of claim 8 , wherein the parameter of the programming electrical pulse comprises a fall time of the programming electrical pulse.

12. The method of claim 8 , wherein the one or more memory cells comprise phase change memory (PCM) cells.

13. An electronic memory apparatus, comprising:

a memory array including a plurality of memory cells; and

a control unit in electronic communication with the memory array, wherein the control unit is operable to cause the apparatus to:

detect values of a resistance characteristic associated with the plurality of memory cells;

determine a relationship between a first set of values of the resistance characteristic and a second set of values of the resistance characteristic;

adjust a parameter of a programming electrical pulse based at least in part on the relationship; and

apply the programming electrical pulse to the plurality of memory cells based at least in part on the adjusted parameter.

14. The electronic memory apparatus of claim 13 , wherein the control unit is further operable to cause the apparatus to:

perform read operations on the plurality of memory cells; and

detect the values of the resistance characteristic based at least in part on performing the read operations.

15. The electronic memory apparatus of claim 14 , wherein the control unit is further operable to cause the apparatus to:

program the plurality of memory cells to a reset state; and

detect the values of the resistance characteristic based at least in part on programming the plurality of memory cells to the reset state.

16. The electronic memory apparatus of claim 13 , wherein:

detecting values of the resistance characteristic comprises detecting the first set of values before detecting the second set of values; and

determining the relationship comprises comparing the second set of values to the first set of values.

17. The electronic memory apparatus of claim 16 , wherein the control unit is further operable to cause the apparatus to:

determine, based at least in part on the comparing, that one or more of the second set of values is lower than one or more of the first set of values; and

adjust the parameter of the programming electrical pulse based at least in part on one or more of the second set of values being lower than one or more of the first set of values.

18. The electronic memory apparatus of claim 13 , wherein the parameter of the programming electrical pulse comprises a fall time of the programming electrical pulse.

19. The electronic memory apparatus of claim 13 , wherein detecting values of the resistance characteristic occurs on a periodic basis.

20. The electronic memory apparatus of claim 13 , wherein the plurality of memory cells comprise phase change memory (PCM) cells.