IP Library Granted Patent US 10,648,442
Granted Patent B2
US 10,648,442 · App. 16/159,760 · Granted May 12, 2020

Circuit and method for coil current control

Inventor: Mikio Yamagishi (Fukaya, JP)
Assignee: Semiconductor Components Industries, LLC
F02P3/0435F02P3/055F02P9/002H01T15/00
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,648,442
App. No.
16/159,760
Granted
May 12, 2020
Kind
B2
Abstract

Circuits and methods to control a current in a coil are disclosed. The circuit and methods provide over-dwell protection and soft shut-down functionality to safely discharge the coil. The safe discharge of the coil is facilitated by a soft-start ramp signal that reduces the coil current gradually by controlling a switching device according. A profile of the soft-start ramp signal over time determines the gradual reduction. The profile of the soft-start ramp signal can be adjusted to set (i) an over-dwell period of the coil current, after which the coil current is shut down, and (ii) a soft shut-down period, over which the coil current is gradually reduced.

Claims (35)

1. A circuit for controlling a current in a coil, the circuit comprising:

a capacitor connected between a voltage source (V S ) and an output node;

a first switching device connected between the voltage source and the output node such that when the first switching device is in an ON state the output node is coupled to the voltage source, and when the first switching device is in an OFF state the output node is coupled to the voltage source through the capacitor; and

a voltage-controlled current-source (VCCS) connected between the output node and a ground, the VCCS outputting a current that charges the capacitor such that when the first switching device is moved from the ON state to the OFF state, a voltage is generated at the output node that decreases over a period from V S to a ground voltage according to a soft-start-profile.

2. The circuit for controlling a current in a coil according to claim 1 , further comprising an insulated gate bipolar transistor (IGBT) having a collector coupled to the coil, an emitter coupled to ground, and a gate coupled to the output node such that the voltage generated at the output node reduces a gate-emitter voltage (V GE ) of the IGBT to reduce a current through the IGBT and the coil.

3. The circuit for controlling a current in a coil according to claim 2 , further comprising a non-inverting amplifier coupled between the gate coupled and the output node.

4. The circuit for controlling a current in a coil according to claim 1 , wherein the current output by the VCCS between a minimum current (I START ) and a maximum current (I CHG ) corresponds to a voltage (V CAP ) across the capacitor as the capacitor is charged.

5. The circuit for controlling a current in a coil according to claim 4 , wherein for the current output by the VCCS equals I START when V CAP equals zero volts.

6. The circuit for controlling a current in a coil according to claim 4 , wherein the current output by the VCCS between a minimum current (I START ) and a maximum current (I CHG ) corresponds to a voltage (V CAP ) is linearly related to V CAP by a slope (dI/dV).

7. The circuit for controlling a current in a coil according to claim 1 , wherein the voltage generated at the output node drives a gate of a second switching device to control the current in the coil.

8. The circuit for controlling a current in a coil according to claim 7 , wherein a soft-start profile of the voltage generated at the output node driving the gate of the second switching device configures the second switching device to reduce the current in the coil to zero over a soft shut-down period that begins after an over-dwell period.

9. The circuit for controlling a current in a coil according to claim 8 , wherein the soft shut-down period and the over-dwell period are each controlled by the soft-start profile.

10. The circuit for controlling a current in a coil according to claim 8 , wherein the soft-start profile is determined by characteristics of the voltage-controlled current-source.

11. The circuit for controlling a current in a coil according to claim 10 , wherein the characteristics include a minimum current (I START ), a maximum current (I CHG ), and a slope (dI/dV) of an output current versus an input voltage.

12. A method for controlling a current in a coil, the method comprising:

receiving a charge coil trigger signal

generating a soft-start ramp signal that has a voltage profile that decreases with time; and

applying the soft-start ramp signal to a gate of a switching device to gradually shut down the current in the coil over a soft shut-down period after an over-dwell period, wherein the soft shut-down period and the over-dwell period correspond to the voltage profile of the soft-start ramp signal.

13. The method according to claim 12 , wherein the generating a soft-start ramp signal includes:

coupling a first side of a capacitor to a source voltage;

controlling a current charging the capacitor using a voltage controlled current source (VCCS) that is connected between a second side of the capacitor and a ground voltage; and

outputting the soft-start ramp signal as a voltage at the second side of the capacitor.

14. The method according to claim 13 , wherein a voltage across the capacitor is applied to an input of the VCCS to control current charging the capacitor.

15. The method according to claim 13 , wherein the voltage profile that decreases with time is controlled by operating characteristics of the VCCS.

16. The method according to claim 15 , wherein the operating characteristics of the VCCS include a minimum current, a maximum current, and a slope (dI/dV).

17. The method according to claim 15 , further comprising:

adjusting the operating characteristics of the VCCS to provide a particular over-dwell period or a particular soft shut-down period.

18. The method according to claim 12 , wherein the switching device is an insulated gate bipolar transistor (IGBT).

19. A soft-start ramp generator, comprising:

a voltage source terminal;

a ground terminal;

an output node;

a capacitor coupled between the voltage source terminal and the output node; and

a voltage controlled current source (VCCS) coupled between the output node and the ground terminal, the VCCS configured to control a current through the capacitor based on a voltage across the capacitor so that a voltage at the output node decreases from a voltage at the voltage source terminal to a voltage at the ground terminal according to a soft-start profile.

20. The soft-start ramp generator according to claim 19 , wherein voltage at the output node of the soft-start ramp generator is coupled to a switching device to control a current in a coil to gradually decrease over a soft shut-down period after an over-dwell period.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 048327, FRAME 0670 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064079/0001 →
SECURITY INTEREST Recorded Feb 13, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 048327/0670 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2018
From: YAMAGISHI, MIKIO
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 047157/0977 →