IP Library Granted Patent US 10,741,460
Granted Patent B2
US 10,741,460 · App. 16/162,195 · Granted Aug 11, 2020

Methods for forming interconnect assemblies with probed bond pads

Inventors: Owen R. Fay (Meridian, ID); Kyle K. Kirby (Eagle, ID); Luke G. England (Saratoga Springs, NY); Jaspreet S. Gandhi (San Jose, CA)
Assignee: Micron Technology, Inc.
H01L22/32H01L22/14H01L24/03H01L24/05H01L24/13H05K999/99H01L2224/02163H01L2224/0391H01L2224/0392H01L2224/0401H01L2224/05567H01L2224/05624H01L2224/13005H01L2224/13012H01L2224/13013H01L2224/13018H01L2224/13022H01L2224/13083H01L2224/13111H01L2224/13124H01L2224/13139H01L2224/13147H01L2224/13155H01L2924/00014H01L2924/1461
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Quick Facts
Patent No.
US 10,741,460
App. No.
16/162,195
Granted
Aug 11, 2020
Kind
B2
Abstract

An interconnect assembly includes a bond pad and an interconnect structure configured to electrically couple an electronic structure to the bond pad. The interconnect structure physically contacts areas of the bond pad that are located outside of a probe contact area that may have been damaged during testing. Insulating material covers the probe contact area and defines openings spaced apart from the probe contact area. The interconnect structure extends through the openings to contact the bond pad.

Claims (30)

1. An assembly, comprising:

a semiconductor structure including a probed bond pad with a probe mark;

a microelectronic structure including circuitry; and

an interconnect structure coupled to the microelectronic structure and physically contacting the probed bond pad such that the circuitry of the microelectronic structure is electrically coupled to the semiconductor structure, wherein the interconnect structure physically contacts only one or more areas of the probed bond pad, wherein all of the one or more areas are spaced apart from the probe mark,

wherein the only one or more areas of the probed bond pad includes two discrete areas physically contacted by the interconnect structure and part of a continuous region of the probed bond pad.

2. The assembly of claim 1 , wherein the probe mark is directly underneath the interconnect structure.

3. The assembly of claim 1 , further comprising an insulating material covering the probe mark.

4. The assembly of claim 1 , wherein the interconnect structure includes a plug portion physically contacting the probed bond pad.

5. The assembly of claim 1 , wherein the microelectronic structure includes at least one of a microelectromechanical system, a memory, or an LED structure.

6. The assembly of claim 1 , wherein the microelectronic structure is a microelectromechanical structure and the semiconductor structure includes an ASIC device.

7. The assembly of claim 1 , wherein the probe mark is a deformed region along an exposed surface of the probed pad.

8. The assembly of claim 1 , wherein an electrically insulating material covers the entire probe mark.

9. The assembly of claim 1 , further comprising

a first insulating material covering at least a portion of the probed bond pad; and

a second insulating material covering the probe mark.

10. The assembly of claim 9 , wherein the second insulating material is a passivation material.

11. The assembly of claim 1 , wherein the probe mark is damage to the probed bond pad caused by a probing pin.

12. An assembly, comprising:

a semiconductor structure including a probed bond pad with a probe mark;

a microelectronic structure including circuitry;

an interconnect structure coupled to the microelectronic structure and physically contacting the probed bond pad such that the circuitry of the microelectronic structure is electrically coupled to the semiconductor structure, wherein the interconnect structure physically contacts only one or more areas of the probed bond pad, wherein all of the one or more areas are spaced apart from the probe mark; and

an insulating material that covers at least a portion of the probe mark, the insulating material defines a first opening and a second opening, and

wherein the interconnect structure includes

a first portion extending through the first opening to contact a first area of the one or more areas, and

a second portion extending through the second opening to contact a second area of the one or more areas.

13. The assembly of claim 12 , wherein the interconnect structure is a pillar having a plurality of plugs extending through the respective first and second openings in the insulating material to electrically contact the probed bond pad.

14. The assembly of claim 12 , wherein the insulating material fills the probe mark.

15. The assembly of claim 12 , wherein the probe mark is directly underneath the interconnect structure.

16. The assembly of claim 12 , wherein the microelectronic structure includes at least one of a MEMS structure, a LED device, a memory, or a semiconductor die.

17. The assembly of claim 12 , wherein the probe mark is deformation, which is caused by a probing pin, along a surface of the probed bond pad.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051041/0317 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050724/0392 →
SUPPLEMENT NO. 12 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048948/0677 →
SUPPLEMENT NO. 3 TO PATENT SECURITY AGREEMENT Recorded Apr 19, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048951/0902 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 16, 2018
From: FAY, OWEN R.; KIRBY, KYLE K.; ENGLAND, LUKE G.; GANDHI, JASPREET S.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047187/0185 →