IP Library Granted Patent US 10,650,897
Granted Patent B2
US 10,650,897 · App. 16/162,772 · Granted May 12, 2020

Storage device and method for operating the same

Inventor: Beom Ju Shin (Gyeonggi-do, KR)
Assignee: SK hynix Inc.
G11C16/102G06F3/0614G06F3/0658G06F3/0673G11C16/26
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Quick Facts
Patent No.
US 10,650,897
App. No.
16/162,772
Granted
May 12, 2020
Kind
B2
Abstract

A storage device may perform a reprogram operation on a page on which a program operation is interrupted due to a sudden power off. The storage device may include a memory device including a plurality of memory blocks, each of which includes a plurality of pages, and a memory controller configured to perform a reprogram operation on a page in which a program operation is suspended using reprogram data that is set depending on threshold voltages of memory cells included in the page on which the program operation is interrupted, among the plurality of pages.

Claims (32)

1. A storage device, comprising:

a memory device including a plurality of memory blocks, each of which includes a plurality of pages; and

a memory controller configured to perform a reprogram operation on a page on which a program operation is interrupted using reprogram data that is set depending on threshold voltages of memory cells included in the page on which the program operation is interrupted, among the plurality of pages,

wherein the program operation which is interrupted and the reprogram operation are performed on the same page.

2. The storage device according to claim 1 , wherein the memory controller is configured to, when the threshold voltages of the memory cells are in a state before the program operation is performed, set program data as the reprogram data, the program data being data to be stored depending on the program operation.

3. The storage device according to claim 2 , wherein the state before the program operation is performed indicates a state in which the threshold voltages of the memory cells are lower than a default read voltage and are lower than a lower read voltage which is lower than the default read voltage.

4. The storage device according to claim 1 , wherein the memory controller is configured to, in a case where the page on which the program operation is interrupted is an irrecoverable page, set garbage data as the reprogram data.

5. The storage device according to claim 4 , wherein the garbage data is data that guarantees a failure in a read operation on a failed page to which the garbage data is programmed.

6. The storage device according to claim 4 , wherein the garbage data is data generated such that a program disturbance caused by the reprogram operation is minimized.

7. The storage device according to claim 4 , wherein the memory controller is configured to program the garbage data to the page on which the program operation is interrupted and to store failed page information, indicating that the garbage data is stored in the page on which the program operation is interrupted, in the memory device.

8. The storage device according to claim 7 , wherein the memory controller is configured to store the failed page information in a spare area of the page on which the program operation is interrupted.

9. The storage device according to claim 7 , wherein the memory controller is configured to store the failed page information in a system information area of a memory block including the page on which the program operation is interrupted.

10. The storage device according to claim 4 , wherein the case where the page on which the program operation is interrupted is the irrecoverable page indicates a state in which the threshold voltages of the memory cells are lower than a default read voltage and are higher than a lower read voltage which is lower than the default read voltage.

11. The storage device according to claim 1 , wherein the memory controller is configured to, in a case where the page on which the program operation is interrupted is a recoverable page, set modified program data, in which program data is modified, as the reprogram data.

12. The storage device according to claim 11 , wherein the case where the page on which the program operation is interrupted is the recoverable page indicates a state in which the threshold voltages of the memory cells are higher than a default read voltage and are higher than an upper read voltage which is higher than the default read voltage.

13. The storage device according to claim 12 , wherein the modified program data is data in which data to be stored in memory cells, which are read as off-cells as a result of a read operation using the upper read voltage, changes to ‘1’ in the program data, the program data being data to be stored depending on the program operation.

14. A method for operating a storage device, the storage device including a memory device having a plurality of memory blocks, each of which includes a plurality of pages, and a memory controller for controlling the memory device, the method comprising:

performing a read operation on a page on which a program operation is interrupted, among the plurality of pages, using a default read voltage; and

performing a read operation using any one of a lower read voltage and an upper read voltage based on a result of the read operation using the default read voltage, and performing a reprogram operation based on a result of the read operation, wherein the lower read voltage has a voltage level lower than that of the default read voltage and the upper read voltage has a voltage level higher than that of the default read voltage.

15. The method according to claim 14 , where performing the reprogram operation comprises:

performing a read operation on a page, on which the program operation is interrupted, using the lower read voltage when the read operation using the default read voltage passes; and

setting reprogram data to be used for the reprogram operation based on a result of the read operation on the page, on which the program operation is interrupted, using the lower read voltage.

16. The method according to claim 15 , wherein setting the reprogram data is configured to:

when a number of off-cells is greater than a reference number of off-cells as a result of the read operation using the lower read voltage, set program data as the reprogram data, the program data being data to be stored depending on the program operation.

17. The method according to claim 15 , wherein setting the reprogram data is configured to, when a number of off-cells is not greater than a reference number of off-cells as a result of the read operation using the lower read voltage, set garbage data to be the reprogram data.

18. The method according to claim 14 , where performing the reprogram operation comprises:

when the read operation using the default read voltage fails, performing a read operation on the page, on which the program operation is interrupted, using the upper read voltage; and

setting reprogram data to be used for the reprogram operation based on a result of the read operation on the page, on which the program operation is interrupted, using the upper read voltage.

19. The method according to claim 18 , wherein setting the reprogram data is configured such that, when the read operation using the upper read voltage fails, data in which data to be stored in memory cells, which are read as off-cells as a result of the read operation using the upper read voltage, changes to ‘1’ in program data and is set as the reprogram data, the program data being data to be stored depending on the program operation.

20. A storage device, comprising:

a memory device configured to perform a program operation of storing program data in a page selected from among a plurality of pages; and

a memory controller configured to, when the program operation is interrupted due to a sudden power off, control the memory device such that any one of garbage data, the program data, and modified program data in which part of the program data is modified is stored in the selected page based on a result of reading the selected page using at least two of a default read voltage, a lower read voltage having a voltage level lower than that of the default read voltage, and an upper read voltage having a voltage level higher than that of the default read voltage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2018
From: SHIN, BEOM JU
To: SK HYNIX INC.
Reel/Frame 047197/0327 →
Priority Claims (1)
KR 10-2018-0032847 · Mar 21, 2018 · national
Continuity (1)
Related Publication 20190295655A1 · Sep 26, 2019