Direct charging with mutual active clamp

1. A power converter with

a high side switching element and a low side switching element arranged in series between an input terminal of a power converter and a reference terminal;

a first feedback circuit configured to control an output voltage or an output current at an output terminal of the power converter, said first feedback circuit comprising a first comparator configured to generate a first control signal for controlling the switching of said high side and said low side switching elements by comparing a first error voltage with a first ramp signal;

a second feedback circuit configured to control said output voltage or said output current, the second feedback circuit comprising a second comparator configured to generate a second control signal by comparing a second error voltage with a second ramp signal; and

a selective clamping unit configured to determine if the first error voltage is larger than the second error voltage, and to reduce the first error voltage if it is determined that the first error voltage is larger than the second error voltage.

2. The power converter of claim 1 , wherein the selective clamping unit is configured to reduce the first error voltage if a voltage difference between the first error voltage and the second error voltage exceeds a predetermined threshold voltage.

3. The power converter of claim 1 , further comprising a control circuit configured to generate a combined control signal for controlling the switching of said high side and said low side switching elements based on the second error voltage when the first error voltage is larger than the second error voltage.

4. The power converter of claim 3 , wherein the control circuit further comprises a logic gate configured to generate the combined control signal based on the first control signal and the second control signal.

5. The power converter of claim 4 , wherein the logic gate is an AND-gate.

6. The power converter of claim 1 , wherein the first feedback circuit comprises a first error amplifier configured to generate the first error voltage by amplifying a difference between a first reference voltage and a first feedback voltage from the output of the power converter, and wherein the second feedback circuit comprises a second error amplifier configured to generate the second error voltage by amplifying a difference between a second reference voltage and a second feedback voltage from the output of the power converter.

7. The power converter of claim 1 , wherein the first feedback circuit is configured to control the output current of the power converter, and wherein the second feedback circuit is configured to control the output voltage of the power converter.

8. The power converter of claim 7 , wherein the first feedback circuit is configured to control the output current during a first time interval, and wherein the second feedback circuit is configured to control the output voltage during a subsequent, second time interval.

9. The power converter of claim 1 , wherein both the first ramp signal and the second ramp signal are generated by the same ramp signal generator.

10. The power converter of claim 9 , wherein the same ramp signal generator is configured to generate the first and the second ramp signal based on a voltage at an intermediate node connecting the high side switching element and the low side switching element.

11. A method for operating a power converter with a high side switching element and a low side switching element arranged in series between an input terminal of the power converter and a reference terminal, the method comprising:

generating a first control signal for controlling the switching of said high side and said low side switching elements by comparing a first error voltage with a first ramp signal;

generating a second control signal for controlling the switching of said high side and said low side switching elements by comparing a second error voltage with a second ramp signal;

determining if the first error voltage is larger than the second error voltage and reducing the first error voltage if it is determined that the first error voltage is larger than the second error voltage.

12. The method according to claim 11 , wherein reducing the first error voltage comprises reducing the first error voltage if a voltage difference between the first error voltage and the second error voltage exceeds a predetermined threshold voltage.

13. The method according to claim 11 , further comprising

generating, by a control circuit, a combined control signal for controlling the switching of the switching element based on the second error voltage when the first error voltage is larger than the second error voltage.

14. The method according to claim 13 , further comprising

providing a logic gate within the control circuit, and

generating, by said logic gate, the combined control signal based on the first control signal and based on the second control signal.

15. The method according to claim 14 , further comprising

determining, by said logic gate, the combined control signal by performing a logical AND-operation on the first control signal and on the second control signal.

16. The method according to claim 11 , further comprising

providing, as part of the first feedback circuit, a first error amplifier,

generating, by said first error amplifier, the first error voltage by amplifying a difference between a first reference voltage and a first feedback voltage from the output of the power converter,

providing, as part of the second feedback circuit, a second error amplifier, and

generating, by said second error amplifier, the second error voltage by amplifying a difference between a second reference voltage and a second feedback voltage from the output of the power converter.