Vertical solid-state transducers and high voltage solid-state transducers having buried contacts and associated systems and methods
View Patent ↗Solid-state transducers (“SSTs”) and vertical high voltage SSTs having buried contacts are disclosed herein. An SST die in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the transducer structure, and a second semiconductor material at a second side of the transducer structure. The SST can further include a plurality of first contacts at the first side and electrically coupled to the first semiconductor material, and a plurality of second contacts extending from the first side to the second semiconductor material and electrically coupled to the second semiconductor material. An interconnect can be formed between at least one first contact and one second contact. The interconnects can be covered with a plurality of package materials.
1. A method of forming a solid-state transducer (SST) die, comprising:
forming a transducer structure having a first semiconductor material on a first side and a second semiconductor material on a second side;
separating the transducer structure into at least first and second electrically isolated junctions;
electrically coupling a first contact to the first semiconductor material at the first junction;
electrically coupling a second contact to the second semiconductor material at the second junction, wherein the second contact extends through the first semiconductor material and is electrically isolated from the first semiconductor material;
forming an interconnect between the first contact and the second contact such that the first and second junctions are electrically connected in series; and
electrically coupling a third contact to the interconnect, wherein the third contact is configured to cross-connect to another contact on a second SST die.
2. The method of claim 1 wherein the second contact extends through a channel formed through the first semiconductor material.
3. The method of claim 2 , further comprising disposing a light-emitting active material between the first semiconductor material and the second semiconductor material, and wherein the second contact extends through the channel formed through the first semiconductor material and through the light-emitting active material.
4. The method of claim 2 , further comprising lining the channel with a dielectric material to electrically insulate the second contact from the first semiconductor material.
5. The method of claim 1 , further comprising disposing a dielectric material between the interconnect and the first semiconductor material and disposing a plurality of package materials covering the interconnect.
6. The method of claim 1 wherein the first contact and the second contact are buried, and further comprising forming a first external terminal and a second external terminal, wherein the first and second external terminals are configured to connect to a power source.
7. The method of claim 1 wherein the transducer structure is a vertical transducer structure having the first contact and second contact at the first side, and wherein the SST die is configured to directly attach to an external component.
8. The method of claim 1 wherein each junction comprises an individually addressable light-emitting diode (LED) die.
9. The method of claim 1 , further comprising disposing a thermal pad on the first side.
10. The method of claim 1 , further comprising disposing a dielectric material over the first contact, the dielectric material having a plurality of openings that are aligned with the first and second contacts.
11. A method of forming a light-emitting diode (LED) comprising:
forming a light-emitting transducer structure having a light-emitting active region positioned between a first semiconductor material and a second semiconductor material;
separating the transducer structure into at least first and second electrically isolated junctions;
electrically coupling a first contact to the first semiconductor material at the first junction;
electrically coupling a second contact to the second semiconductor material at the second junction, wherein the second contact extends through the first semiconductor material and is electrically isolated from the first semiconductor material;
forming an interconnect between the first contact and the second contact such that the first and second junctions are electrically connected in series; and
electrically connecting a third contact to the interconnect, wherein the third contact is configured to cross-connect to another contact on a second LED.
12. The method of claim 11 wherein the second contact extends through the light-emitting active region.
13. The method of claim 12 wherein the second contact extends through a channel formed through the first semiconductor material and the light-emitting active region.
14. The method of claim 12 further comprising lining the channel with a dielectric material to electrically insulate the second contact from the first semiconductor material.
15. The method of claim 11 , further comprising disposing a passivation material over the interconnect such that the interconnect is encased in the passivation material.
16. The method of claim 11 , further comprising disposing a plurality of package materials over the passivation material and the interconnect.
17. The method of claim 11 , further comprising forming a thermal pad on the first side.
18. The method of claim 11 , further comprising disposing a dielectric material over the first contact, the dielectric material having a plurality of openings that are aligned with the first and second contacts.