IP Library Granted Patent US 11,018,182
Granted Patent B2
US 11,018,182 · App. 16/171,334 · Granted May 25, 2021

Pixel structure

Inventors: Yi-Jyun Chen (Chiayi County, TW); Li-Cheng Yang (Taoyuan, TW); Yu-Chun Lee (Hsinchu County, TW); Shiou-Yi Kuo (Hsinchu, TW); Chih-Hao Lin (Taipei, TW)
Assignee: Lextar Electronics Corporation
H01L27/15H01L25/0753H01L27/156H01L33/08H01L33/38H01L33/504H01L33/52H01L33/58H01L33/46
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,018,182
App. No.
16/171,334
Granted
May 25, 2021
Kind
B2
Abstract

A pixel structure includes a light emitting diode chip and a light blocking structure. The light emitting diode chip includes a P-type semiconductor layer, an active layer, an N-type semiconductor layer, a first electrode, and K second electrodes. The active layer is located on the P-type semiconductor layer. The N-type semiconductor layer is located on the active layer. The N-type semiconductor layer has a first top surface that is distant from the active layer. The first electrode is electrically connected to the P-type semiconductor layer. The light blocking structure is located in the light emitting diode chip and defines K sub-pixel regions. The active layer and the N-type semiconductor layer are divided into K sub-portions respectively corresponding to the K sub-pixel regions by the light blocking structure. The K sub-pixel regions share the P-type semiconductor layer.

Claims (38)

1. A pixel structure, comprising:

a light emitting diode chip, comprising:

a P-type semiconductor layer;

an active layer disposed on the P-type semiconductor layer;

a N-type semiconductor layer disposed on the active layer, wherein the N-type semiconductor layer has a first top surface that is distant from the active layer;

a first electrode electrically connected to the P-type semiconductor layer; and

K second electrodes, wherein K is a positive integer greater than or equal to 3; and

a light blocking structure disposed in the light emitting diode chip and defining K sub-pixel regions, wherein the active layer and the N-type semiconductor layer are divided into K sub-portions respectively corresponding to the K sub-pixel regions by the light blocking structure, the K sub-pixel regions share the P-type semiconductor layer, the K second electrodes are respectively electrically connected to the K sub-portions of the N-type semiconductor layer, and the first top surface is divided into K light emitting surfaces corresponding to the K sub-pixel regions by the light blocking structure, wherein the P-type semiconductor layer has a first bottom surface that is distant from the first top surface, the active layer has a second bottom surface that is distant from the first top surface, and the light blocking structure has a third bottom surface between the first bottom surface and the second bottom surface.

2. The pixel structure of claim 1 , wherein the light blocking structure further has a second top surface that is distant from the P-type semiconductor layer, and wherein the second top surface is not lower than the first top surface.

3. The pixel structure of claim 2 , wherein the light blocking structure extends from the third bottom surface to the second top surface.

4. The pixel structure of claim 1 , wherein the first electrode and the K second electrodes are present on one side of the light emitting diode chip relative to the first top surface.

5. The pixel structure of claim 1 , wherein currents passing through the first electrode and any of the K second electrodes are the same.

6. The pixel structure of claim 1 , wherein voltages between the first electrode and any of the K second electrodes are the same.

7. The pixel structure of claim 1 , further comprising:

L wavelength transfer layers respectively disposed on L light emitting surfaces of the K light emitting surfaces, wherein L is a positive integer less than or equal to K.

8. The pixel structure of claim 7 , wherein at least two of the L wavelength transfer layers are excited to generate different light emitting bands.

9. The pixel structure of claim 7 , wherein L is a positive integer less than K such that at least one of the K light emitting surfaces does not have any of the L wavelength transfer layers.

10. The pixel structure of claim 9 , further comprising:

a transparent adhesive disposed on the light emitting surface that does not have any of the L wavelength transfer layers.

11. The pixel structure of claim 7 , wherein the L wavelength transfer layers respectively have a vertical projection region on the L light emitting surfaces, and area of the vertical projection regions respectively correspond to area of the L light emitting surfaces.

12. The pixel structure of claim 11 , further comprising:

at least one spacer disposed between the L wavelength transfer layers.

13. The pixel structure of claim 7 , wherein the light blocking structure comprises:

a first portion embedded in the N-type semiconductor layer and the active layer under the first top surface; and

a second portion covering the first top surface to define at least L accommodating spaces, and the L wavelength transfer layers respectively disposed in the L accommodating spaces.

14. The pixel structure of claim 13 , wherein the second portion protrudes above the first top surface.

15. The pixel structure of claim 1 , wherein at least two of the K light emitting surfaces have different areas.

16. A pixel structure, comprising:

a light emitting diode chip, comprising:

a P-type semiconductor layer;

an active layer disposed on the P-type semiconductor layer;

a N-type semiconductor layer disposed on the active layer, wherein the N-type semiconductor layer has a first top surface that is distant from the active layer;

a first electrode electrically connected to the P-type semiconductor layer; and

K second electrodes, wherein K is a positive integer greater than or equal to 3; and

a light blocking structure disposed in the light emitting diode chip and defining K sub-pixel regions, wherein the active layer and the N-type semiconductor layer are divided into K sub-portions respectively corresponding to the K sub-pixel regions by the light blocking structure, the K sub-pixel regions share the P-type semiconductor layer, the K second electrodes are respectively electrically connected to the K sub-portions of the N-type semiconductor layer, and the first top surface is divided into K light emitting surfaces corresponding to the K sub-pixel regions by the light blocking structure, wherein the light blocking structure comprises an insulating layer and a reflective layer.

17. The pixel structure of claim 16 , wherein the reflective layer comprises a white glue reflective material comprising titanium dioxide, silicon dioxide, zinc oxide, boron nitride or combinations thereof.

18. The pixel structure of claim 16 , wherein the reflective layer comprises a metal reflective material comprising aluminum, silver, silver-plated copper, aluminum-plated copper or combinations thereof.

19. The pixel structure of claim 16 , wherein the K sub-pixel regions are arranged in a strip form, a rectangle form or a diamond form.

Assignments (2)
MERGER Recorded Mar 27, 2026
From: LEXTAR ELECTRONICS CORPORATION
To: ENNOSTAR CORPORATION
Reel/Frame 075286/0822 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2018
From: CHEN, YI-JYUN; YANG, LI-CHENG; LEE, YU-CHUN; KUO, SHIOU-YI; LIN, CHIH-HAO
To: LEXTAR ELECTRONICS CORPORATION
Reel/Frame 047322/0383 →