IP Library › Granted Patent US 11,905,204
Granted Patent B2
US 11,905,204 · App. 16/171,516 · Granted Feb 20, 2024

Cover glass and electronic device with the same and method for manufacturing cover glass

Inventors: Wook-Tae Kim (Gyeonggi-do, KR); In-Gi Kim (Chungcheongnam-do, KR); Ji-Won Lee (Gyeonggi-do, KR); Chang-Soo Lee (Gyeonggi-do, KR); Hyung-jin Lee (Gyeonggi-do, KR); Gyu-Ha Jo (Seoul, KR); Yong-Hyun Cho (Gyeonggi-do, KR)
Assignee: Samsung Electronics Co., Ltd.
C03C17/42C03C17/002C03C17/02C03C17/25C03C17/30C03C2203/52C03C2204/08C03C2217/213C03C2217/285C03C2217/77C03C2217/78C03C2218/112C03C2218/32G06F3/041
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Quick Facts
Patent No.
US 11,905,204
App. No.
16/171,516
Granted
Feb 20, 2024
Kind
B2
Abstract

According to an embodiment, a cover glass includes a glass plate forming at least a portion of an electronic device, and a first coat layer deposited on a surface of the glass plate, the first coat layer at least partially including a network structure. The first coat layer includes silicon (Si), oxygen (O), and at least one impurity, and such that Si—O bonds are 80% or more by weight of the first coat layer. A polysilazane-applied coat is laid over one surface of the reinforced glass plate, providing an elegant haze glass cover.

Claims (56)

1. A cover glass included in a rear cover for an electronic device, comprising:

a glass plate forming at least a portion of the electronic device; and

a first coat layer disposed on a surface of the glass plate, the first coat layer at least partially including a network structure with multiple protrusion-and-depression shapes formed by inorganic polysilazane coated on the surface of the glass plate, wherein the first coat layer has a hazing exceeding 5% and a transmittance of less than 91%, the first coat layer being steam hardening-processed in a temperature range of 100° C. to below 200° C. for a time range of 30 minutes to 120 minutes during a first hardening step, and processed with peroxide in a temperature range at 30° C. to 200° C. for three hours during a second hardening step after the first hardening step,

a second coat layer disposed on a surface of the first coat layer and including a shape corresponding to the network structure of the first coat layer,

wherein the first coat layer includes silicon (Si), oxygen (O), and at least one impurity,

wherein Si—O bonds are at least 80% by-weight of mass of the first coat layer, and

wherein the hazing denotes a state in a middle of changing from transparent to opaque depending on a percent of the hazing,

wherein the multiple protrusion-and-depression shapes includes a plurality of valley portions and peak portions,

wherein the plurality of valley portions have a thickness ranging from 300 nm to 600 nm, and the peak portions have a thickness ranging from 0.6 μm to 2 μm, and

wherein a thickness of the first coat layer is implemented in a range of a thickness of the plurality of valley portions and a thickness of the peak portions so that a degree of the hazing is not lowered.

2. The cover glass of claim 1 , wherein the first coat layer is hardened to at least 2200 MPa by thermal processing.

3. The cover glass of claim 2 , wherein the network structure of the first coat layer includes:

the multiple protrusion-and-depression shapes including a predetermined pitch along a lengthwise direction, and a predetermined height along a direction perpendicular to the lengthwise direction, and

wherein the predetermined pitch of the multiple protrusion-and-depression shapes ranges from 20 μm to 60 um, and a height of the multiple protrusion-and-depression shapes ranges from 0.5 μm to 0.9 μm.

4. The cover glass of claim 2 , wherein the network structure of the first coat layer includes the multiple protrusion-and-depression shapes with a predetermined pitch along a lengthwise direction, and a predetermined height along a direction perpendicular to the lengthwise direction, and

wherein a ratio of the predetermined height to the predetermined pitch ranges from 0.004 to 0.015.

5. The cover glass of claim 3 , wherein the first coat layer includes hazing less than 35%.

6. The cover glass of claim 3 , wherein the network structure of the first coat layer including the multiple protrusion-and-depression shapes generate a surface roughness, and

wherein a surface roughness average (Ra) of the first coat layer has a value ranging from 100 nm to 300 nm, or a root mean square (RMS) roughness of the surface roughness of the first coat layer has a value ranging from 130 nm to 400 nm.

7. The cover glass of claim 2 ,

wherein the second coat layer includes a fluorine chain or a hydrocarbon chain.

8. The cover glass of claim 7 , wherein the second coat layer is configured to provide anti-fingerprint visibility, and wherein ΔE*ab is four or less according to Equation 1 below:

Δ E* ab =√{right arrow over (( L* 2 −L* 1 ) 2 +( a* 2 −a* 1 ) 2 +( b* 2 −b* 1 ) 2 )}  [Equation 1]

wherein L*1 is a brightness value before processed with the second coat layer, L*2 is a brightness value after processed with the second coat layer, a*1 is a color value before processed with the second coat layer, a*2 is a color value after processed with the second coat layer, b*1 is a chroma value before processed with the second coat layer, and b*2 is a chroma value after processed with the second coat layer.

9. The cover glass of claim 7 , wherein the second coat layer includes a transparent material and formed in a thickness slimmer than a thickness of the first coat layer.

10. An electronic device, comprising:

a housing including a front cover facing in a first direction and a rear cover facing in a second direction which is opposite to the first direction, the housing having a transparent area forming at least part of the front cover;

a battery disposed within the housing; and

a display device disposed within the housing and including a screen area exposed through the front cover, wherein the rear cover includes:

a glass plate,

a first coat layer disposed on a surface of the glass plate, the first coat layer at least partially including a network structure with multiple protrusion-and-depression shapes formed by inorganic polysilazane coated on the surface of the glass plate, wherein the first coat layer has a hazing exceeding 5% and a transmittance of less than 91%, the first coat layer being steam hardening-processed in a temperature range of 100° C. to below 200° C. for a time range of 30 minutes to 120 minutes during a first hardening step, and processed with peroxide in a temperature range at 30° C. to 200° C. for three hours during a second hardening step after the first hardening step,

a second coat layer disposed on a surface of the first coat layer and including a shape corresponding to the network structure of the first coat layer,

wherein the hazing denotes a state in a middle of changing from transparent to opaque depending on a percent of the hazing,

wherein the multiple protrusion-and-depression shapes includes a plurality of valley portions and peak portions,

wherein the plurality of valley portions have a thickness ranging from 300 nm to 600 nm, and the peak portions have a thickness ranging from 0.6 μm to 2 μm, and

wherein a thickness of the first coat layer is implemented in a range of a thickness of the plurality of valley portions and a thickness of the peak portions so that a degree of the hazing is not lowered.

11. A method for manufacturing a cover glass of an electronic device, the method comprising:

preparing a glass plate;

wet spraying a first coat layer, the first coat layer at least partially including a network structure with multiple protrusion-and-depression shapes formed by inorganic polysilazane coated on a surface of the glass plate, wherein the first coat layer has a hazing exceeding 5% and a transmittance of less than 91%, on a surface of the prepared glass plate;

stream hardening the first coat layer in a temperature range of 100° C. to below 200° C. for a time range of 30 minutes to 120 minutes;

processing the stream hardened first coat layer with peroxide in a temperature range at 30° C. to 200° C. for three hours; and

depositing a second coat layer on a surface of the first coat layer, the second coat layer including a shape corresponding to the network structure of the first coat layer;

wherein the first coat layer includes silicon (Si), oxygen (O), and at least one impurity,

wherein Si—O bonds are at least 80% by-weight of mass of the first coat layer, and

wherein the hazing denotes a state in a middle of changing from transparent to opaque depending on a percent of the hazing,

wherein the multiple protrusion-and-depression shapes includes a plurality of valley portions and peak portions,

wherein the plurality of valley portions has a thickness ranging from 300 nm to 600 nm, and the peak portions have a thickness ranging from 0.6 μm to 2 μm, and

wherein a thickness of the first coat layer is implemented in a range of a thickness of the plurality of valley portions and a thickness of the peak portions so that a degree of the hazing is not lowered.

12. The method of claim 11 , wherein the inorganic polysilazane has a weight percentage ratio by mass of polysilazane to a solvent in a coating solution ranges from 5:95 to 20:80, and

wherein a percentage at which the coating solution arrives at a surface of the glass plate is 40%.

13. The method of claim 12 , wherein the coating solution includes 11% to 30% by-weight % of inorganic polysilazane with a weight-average molecular weight according with chemical formula 1 below, the molecular weight ranges from 2,000 to 30,000, and the coating solution is deposited on the glass plate:

wherein R1, R2, and R3 include independently one or more of hydrogen, an alkyl group, an alkenyl group, cycloalkyl group, aryl group, a group attached to silicon, alkylsilyl group, alkylamino group, and an alkoxy group, and n is a positive integer.

14. The method of claim 11 , wherein processing the stream hardened first coat layer further comprises, breaking down Si—N bonds and Si—H bonds that remain after steam hardening and transforming the Si—N bonds and Si—H into Si—O—Si bonds.

15. The method of claim 11 , wherein the first coat layer after processing has a hardness of at least 2,200 MPa.

16. The method of claim 11 , wherein after depositing the second coat layer, the second coat layer includes a carbon fluoride chain or a hydrocarbon chain.

17. The electronic device of claim 10 , wherein the first coat layer includes silicon (Si), oxygen (O), and at least one impurity, and wherein Si—O bonds are at least 80% by-weight of mass of the first coat layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2018
From: KIM, WOOK-TAE; KIM, IN-GI; LEE, JI-WON; LEE, CHANG-SOO; LEE, HYUNG-JIN; JO, GYU-HA; CHO, YONG-HYUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 047324/0193 →
Priority Claims (1)
KR 10-2017-0151779 · Nov 14, 2017 · national
Continuity (1)
Related Publication 20190144332A1 · May 16, 2019