IP Library Granted Patent US 10,658,273
Granted Patent B2
US 10,658,273 · App. 16/173,187 · Granted May 19, 2020

Semiconductor device and manufacturing method thereof

Inventor: Rintaro Asai (Nisshin, JP)
Assignee: Denso Corporation
H01L23/49562H01L23/3121H01L23/3142H01L23/3735H01L23/4334H01L23/49568H01L23/49575H01L24/33H01L25/072H01L2224/33H01L2224/33181H01L2924/1033H01L2924/10253H01L2924/10272H01L2924/13055H01L2924/13091H01L2924/181
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,658,273
App. No.
16/173,187
Granted
May 19, 2020
Kind
B2
Abstract

A semiconductor device may include: a first and a second semiconductor elements; and a first and a second insulated substrates each including an insulator layer and a metal layer disposed on each of two faces of the insulator layer, the metal layers respectively on one face of the first and the second insulated substrate being connected to the first and the second semiconductor element, wherein the metal layers respectively on the one face of the first and the second insulated substrate are electrically connected via a joint each other; the joint is constituted of a separate member from the insulated substrates; and one end of the joint is connected to the metal layer on the one face of the first insulated substrate, and another end of the joint is connected to the metal layer on the one face of the second insulated substrate.

Claims (64)

1. A semiconductor device comprising:

a first semiconductor element and a second semiconductor element;

a first insulated substrate comprising an insulator layer and a metal layer disposed on each of two faces of the insulator layer, the metal layer on one face of the first insulated substrate being connected to the first semiconductor element; and

a second insulated substrate comprising an insulator layer and a metal layer disposed on each of two faces of the insulator layer, the metal layer on one face of the second insulated substrate being connected to the second semiconductor element,

wherein

the metal layer on the one face of the first insulated substrate is electrically connected to the metal layer on the one face of the second insulated substrate via a joint;

the joint is constituted of a separate member from the first insulated substrate and the second insulated substrate; and

one end of the joint is attached to the metal layer on the one face of the first insulated substrate, and another end of the joint is attached to the metal layer on the one face of the second insulated substrate.

2. The semiconductor device according to claim 1 , wherein

a recess part is provided in the metal layer on the one face of at least one of the first insulated substrate and the second insulated substrate, and the one or the other end of the joint is connected to the recess part.

3. The semiconductor device according to claim 2 , wherein

the recess part of the first insulated substrate has a depth smaller than a thickness of the metal layer on the one face of the first insulated substrate, and/or

the recess part of the second insulated substrate has a depth smaller than a thickness of the metal layer on the one face of the second insulated substrate.

4. The semiconductor device according to claim 1 , wherein

at least a part of the metal layer on the one face of the first insulated substrate is opposed to at least a part of the metal layer on the one face of the second insulated substrate.

5. A method of manufacturing the semiconductor device according to claim 1 , the method comprising:

preparing the first insulated substrate, the second insulated substrate, and the joint respectively; and

bonding the one end of the joint to the metal layer on the one face of the first insulated substrate, and bonding the other end of the joint to the metal layer on the one face of the second insulated substrate.

6. The semiconductor device according to claim 1 , wherein

the one end of the joint is bonded to the metal layer on the one face of the first insulated substrate via solder, and

the other end of the joint is bonded to the metal layer on the one face of the second insulated substrate via solder.

7. The semiconductor device according to claim 1 , the semiconductor device further comprising:

a third insulated substrate opposed to the first insulated substrate with the first semiconductor element interposed therebetween; and

a fourth insulated substrate opposed to the second insulated substrate with the second semiconductor element interposed therebetween,

wherein

the third insulated substrate comprises an insulator layer and a metal layer disposed on each of two faces of the insulator layer, the metal layer on one face of the third insulated substrate being connected to the first semiconductor element; and

the fourth insulated substrate comprises an insulator layer and a metal layer disposed on each of two faces of the insulator layer, the metal layer on one face of the fourth insulated substrate being connected to the second semiconductor element.

8. The semiconductor device according to claim 7 , the semiconductor device further comprising an encapsulant that encapsulates the first semiconductor element and the second semiconductor element,

wherein

the encapsulant comprises a first surface and a second surface located opposite the first surface,

the metal layer on another face of the first insulated substrate and the metal layer on another face of the fourth insulated substrate are exposed at the first surface of the encapsulant, and

the metal layer on another face of the second insulated substrate and the metal layer on another face of the third insulated substrate are exposed at the second surface of the encapsulant.

9. A semiconductor device comprising:

a first semiconductor element and a second semiconductor element, the first semiconductor element and the second semiconductor element each including an electrode;

a first insulated substrate comprising an insulator layer and a metal layer disposed on each of two faces of the insulator layer, the metal layer on one face of the first insulated substrate being connected to the first semiconductor element; and

a second insulated substrate comprising an insulator layer and a metal layer disposed on each of two faces of the insulator layer, the metal layer on one face of the second insulated substrate being connected to the second semiconductor element,

wherein

the metal layer on the one face of the first insulated substrate is electrically connected to the metal layer on the one face of the second insulated substrate via a joint;

the joint is constituted of a separate member from the first insulated substrate and the second insulated substrate; and

one end of the joint is connected to the metal layer on the one face of the first insulated substrate, and another end of the joint is connected to the metal layer on the one face of the second insulated substrate.

10. The semiconductor device according to claim 9 , wherein

a recess part is provided in the metal layer on the one face of at least one of the first insulated substrate and the second insulated substrate, and the one or the other end of the joint is connected to the recess part.

11. The semiconductor device according to claim 10 , wherein

the recess part of the first insulated substrate has a depth smaller than a thickness of the metal layer on the one face of the first insulated substrate, and/or

the recess part of the second insulated substrate has a depth smaller than a thickness of the metal layer on the one face of the second insulated substrate.

12. The semiconductor device according to claim 9 , wherein

at least a part of the metal layer on the one face of the first insulated substrate is opposed to at least a part of the metal layer on the one face of the second insulated substrate.

13. A method of manufacturing the semiconductor device according to claim 9 , the method comprising:

preparing the first insulated substrate, the second insulated substrate, and the joint respectively; and

bonding the one end of the joint to the metal layer on the one face of the first insulated substrate, and bonding the other end of the joint to the metal layer on the one face of the second insulated substrate.

14. The semiconductor device according to claim 9 , wherein

the one end of the joint is bonded to the metal layer on the one face of the first insulated substrate via solder, and

the other end of the joint is bonded to the metal layer on the one face of the second insulated substrate via solder.

15. The semiconductor device according to claim 9 , the semiconductor device further comprising:

a third insulated substrate opposed to the first insulated substrate with the first semiconductor element interposed therebetween; and

a fourth insulated substrate opposed to the second insulated substrate with the second semiconductor element interposed therebetween,

wherein

the third insulated substrate comprises an insulator layer and a metal layer disposed on each of two faces of the insulator layer, the metal layer on one face of the third insulated substrate being connected to the first semiconductor element; and

the fourth insulated substrate comprises an insulator layer and a metal layer disposed on each of two faces of the insulator layer, the metal layer on one face of the fourth insulated substrate being connected to the second semiconductor element.

16. The semiconductor device according to claim 15 , the semiconductor device further comprising an encapsulant that encapsulates the first semiconductor element and the second semiconductor element,

wherein

the encapsulant comprises a first surface and a second surface located opposite the first surface,

the metal layer on another face of the first insulated substrate and the metal layer on another face of the fourth insulated substrate are exposed at the first surface of the encapsulant, and

the metal layer on another face of the second insulated substrate and the metal layer on another face of the third insulated substrate are exposed at the second surface of the encapsulant.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: TOYOTA JIDOSHA KABUSHIKI KAISHA (AKA TOYOTA MOTOR CORPORATION)
To: DENSO CORPORATION
Reel/Frame 052280/0207 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 29, 2018
From: ASAI, RINTARO
To: TOYOTA JIDOSHA KABUSHIKI KAISHA
Reel/Frame 047339/0415 →
Priority Claims (1)
JP 2017-211335 · Oct 31, 2017 · national
Continuity (1)
Related Publication 20190131217A1 · May 2, 2019