IP Library Granted Patent US 11,037,970
Granted Patent B2
US 11,037,970 · App. 16/177,697 · Granted Jun 15, 2021

Semiconductor package structure and related methods

Inventor: Yu-Te Hsieh (Taoyuan, TW)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L27/14618H01L27/14636H01L27/14683
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,037,970
App. No.
16/177,697
Granted
Jun 15, 2021
Kind
B2
Abstract

Implementations of semiconductor packages may include: a substrate having a first side and a second side and a die having an active area on a second side of the die. A first side of the die may be coupled to the second side of the substrate. The semiconductor package may also include a glass lid having a first side and a second side. The glass lid may be coupled over a second side of the die. The semiconductor package may include a first and a second molding compound and one or more cushions positioned between a first side of the glass lid and a portion of the first molding compound. The second molding compound may be coupled to the substrate and the around the die and the glass lid.

Claims (37)

1. A semiconductor package comprising:

a substrate comprising a first side and a second side;

a die comprising an active area on a second side of the die, a first side of the die coupled to the second side of the substrate;

a glass lid comprising a first side and a second side, the glass lid coupled over a second side of the die;

a first molding compound and a second molding compound forming an interface around the glass lid; and

one or more cushions positioned between a first side of the glass lid and a portion of the first molding compound;

wherein the first molding compound is coupled to the substrate and around the die and the glass lid.

2. The package of claim 1 , further comprising wire bonds electrically coupling the die to the substrate.

3. The package of claim 1 , wherein the die is an image sensor die.

4. The package of claim 1 , wherein the substrate is one of a stripline or a printed circuit board.

5. The package of claim 1 , further comprising a ball grid array on a first side of the substrate.

6. The package of claim 1 , wherein the one or more cushions are comprised of one of epoxy, silicone, acrylic, resin, polyimide, polymer, or any combination thereof.

7. A semiconductor package comprising:

a substrate comprising a first side and a second side;

a die comprising an active area on a second side of the die, a first side of the die coupled to the second side of the substrate;

a glass lid comprising a first side and a second side opposing the first side, the glass lid coupled over a second side of the die;

a first molding compound coupled to the substrate and around a portion of the die, the first molding compound comprising one or more shelves around the die;

a dam positioned on the one or more shelves and the glass lid coupled to the dam; and

a second molding compound coupled with an edge of the first molding compound, the second molding compound coupled over a portion of the second side of the glass lid.

8. The package of claim 7 , further comprising wire bonds electrically coupling the die to the substrate.

9. The package of claim 7 , wherein the die is an image sensor die.

10. The package of claim 7 , wherein the substrate is one of a stripline or a printed circuit board.

11. The package of claim 7 , further comprising a ball grid array on a first side of the substrate.

12. The package of claim 7 , wherein the dam is selected from a group consisting of epoxy, silicone, acrylic, resin, polyimide, polymer, or any combination thereof.

13. A method of forming a semiconductor package, the method comprising:

coupling a first side of a die to a second side of a substrate;

applying a first molding compound to the second side of the substrate and a portion of the first side of the die, wherein the first molding compound comprises a shelf above a second side of the die;

applying a cushion to the shelf;

coupling a first side of a glass lid to the shelf; and

forming a second molding compound on an interface of the first molding compound, the second molding compound coupled around two or more sides of the glass lid and a portion of a second side of the glass lid that opposes the first side.

14. The method of claim 13 , further comprising curing the cushion to form a dam wherein curing comprises one of environmental curing, thermal curing, or ultraviolet curing.

15. The method of claim 13 , wherein the cushion comprises one of epoxy, silicone, acrylic, resin, polyimide, polymer, or any combination thereof.

16. The method of claim 13 , wherein the die is an image sensor comprising an active area on the second side of the die.

17. The method of claim 13 , wherein the substrate is one of a stripline or a printed circuit board.

18. The method of claim 13 , further comprising plasma cleaning the interface of the first molding compound.

19. The method of claim 13 , further comprising electrically coupling the die to the substrate through wire bonds.

20. The method of claim 13 , further comprising applying a ball grid array to a first side of the substrate.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 048327, FRAME 0670 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064079/0001 →
SECURITY INTEREST Recorded Feb 13, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 048327/0670 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2018
From: HSIEH, YU-TE
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 047383/0211 →