IP Library › Granted Patent US 10,714,475
Granted Patent B2
US 10,714,475 · App. 16/178,340 · Granted Jul 14, 2020

Semiconductor device and manufacturing method thereof

Inventors: Sung-Li Wang (Hsinchu County, TW); Pang-Yen Tsai (Hsinchu County, TW); Yasutoshi Okuno (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L27/0922H01L21/02636H01L21/76897H01L21/823814H01L21/823821H01L21/823871H01L27/092H01L27/0924H01L29/0847H01L29/45H01L29/456H01L29/7853H01L29/7854H01L21/31053H01L21/31111H01L21/3212H01L29/665H01L29/6653H01L29/66545
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,714,475
App. No.
16/178,340
Granted
Jul 14, 2020
Kind
B2
Abstract

A semiconductor device includes first and second epitaxial structures, first and second top metal alloy layers, and first and second bottom metal alloy layers. The first and second epitaxial structures have different cross sections. The first and second top metal alloy layers are respectively in contact with the first and second epitaxial structures. The first and second bottom metal alloy layers are respectively in contact with the first and second epitaxial structures and respectively under the first and second top metal alloy layers. The first top metal alloy layer and the first bottom metal alloy layer are made of different materials.

Claims (37)

1. A semiconductor device comprising:

first and second epitaxial structures, wherein the first and second epitaxial structures have different cross sections;

first and second top metal alloy layers respectively in contact with the first and second epitaxial structures; and

first and second bottom metal alloy layers respectively in contact with the first and second epitaxial structures and respectively under the first and second top metal alloy layers, wherein the first top metal alloy layer and the first bottom metal alloy layer are made of different materials, and the first top metal alloy layer and the first epitaxial structure comprise a same element.

2. The semiconductor device of claim 1 , wherein the second top metal alloy layer and the second bottom metal alloy layer are made of different materials.

3. The semiconductor device of claim 1 , wherein the first epitaxial structure has a substantially hexagon cross section.

4. The semiconductor device of claim 1 , wherein the second epitaxial structure has a substantially diamond cross section.

5. The semiconductor device of claim 1 , wherein the first and second top metal alloy layers are made of the same material.

6. The semiconductor device of claim 1 , wherein the first and second bottom metal alloy layers are made of the same material.

7. The semiconductor device of claim 1 , further comprising a contact above the first epitaxial structure, wherein the contact comprises:

a barrier layer in contact with the first top metal alloy layer; and

a filling material above the barrier layer.

8. The semiconductor device of claim 1 , further comprising a contact etch stop layer (CESL) conformal to the first epitaxial structure, wherein the CESL is spaced apart from the first epitaxial structure.

9. A semiconductor device comprising:

a first epitaxial structure having an upward facing facet facing upwards and a downward facing facet facing downwards;

a second epitaxial structure having an upward facing facet facing upwards and a downward facing facet facing downwards, wherein the first epitaxial structure and the second epitaxial structure have different conductivity types;

first and second top metal alloy layers respectively in contact with the upward facing facet of the first epitaxial structure and the upward facing facet of the second epitaxial structure; and

first and second bottom metal alloy layers respectively in contact with the downward facing facet of the first epitaxial structure and the downward facing facet of the second epitaxial structure, wherein the first top metal alloy layer and the first bottom metal alloy layer have different work functions.

10. The semiconductor device of claim 9 , wherein the work function of the first top metal alloy layer is greater than the work function of the first bottom metal alloy layer.

11. The semiconductor device of claim 9 , wherein the second top metal alloy layer and the second bottom metal alloy layer have different work functions.

12. The semiconductor device of claim 9 , wherein a work function of the second top metal alloy layer is greater than a work function of the second bottom metal alloy layer.

13. The semiconductor device of claim 9 , wherein a first contact area between the first top metal alloy layer and the first epitaxial structure is smaller than a second contact area between the first bottom metal alloy layer and the first epitaxial structure.

14. The semiconductor device of claim 9 , wherein the first top metal alloy layer is conformal to the first epitaxial structure.

15. A method for manufacturing a semiconductor device comprising:

forming first and second epitaxial structures over a substrate, wherein the first and second epitaxial structures have different conductivity types, and the first and second epitaxial structures each has an upward facing facet facing upwards and a downward facing facet facing downwards;

forming first and second metal layers respectively on the upward facing facets of the first and second epitaxial structures;

annealing the first and second metal layers and the first and second epitaxy structures to form a first top metal alloy layer on the upward facing facet of the first epitaxial structure and a second top metal alloy layer on the upward facing facet of the second epitaxial structure;

forming a third metal layer at least on the downward facing facets of the first and second epitaxial structures, wherein the first and third metal layers have different metals; and

annealing the third metal layer and the first and second epitaxial structures to form a first bottom metal alloy layer on the downward facing facet of the first epitaxial structure and a second bottom metal alloy layer on the downward facing facet of the second epitaxial structure.

16. The method of claim 15 , wherein forming the third metal layer is performed such that the third metal layer is further formed on the first top metal alloy layer.

17. The method of claim 15 , wherein a work function of the first metal layer is greater than a work function of the third metal layer.

18. The method of claim 15 , further comprising:

forming a contact etching stop layer over the first epitaxial structure;

removing a first portion of the contact etching stop layer to expose the upward facing facet of the first epitaxial structure, wherein a second portion of the contact etching stop layer remains on the downward facing facet of the first epitaxial structure; and

removing the second portion of the contact etching stop layer after forming the first top metal alloy layer.

19. The method of claim 18 , wherein removing the first portion of the contact etching stop layer comprises anisotropically etching the first portion of the contact etching stop layer.

20. The method of claim 18 , wherein removing the second portion of the contact etching stop layer comprises isotropically etching the second portion of the contact etching stop layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2018
From: WANG, SUNG-LI; TSAI, PANG-YEN; OKUNO, YASUTOSHI
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 047695/0204 →
Continuity (2)
Provisional Application 62591133 · Nov 27, 2017
Related Publication 20190164966A1 · May 30, 2019