IP Library Granted Patent US 10,685,845
Granted Patent B2
US 10,685,845 · App. 16/182,061 · Granted Jun 16, 2020

Method for preparing a semiconductor structure

Inventor: Shing-Yih Shih (New Taipei, TW)
Assignee: NANYA TECHNOLOGY CORPORATION
H01L21/3088H01L21/3085H01L21/3086H01L21/76898
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Quick Facts
Patent No.
US 10,685,845
App. No.
16/182,061
Granted
Jun 16, 2020
Kind
B2
Abstract

The present disclosure provides a method for preparing a semiconductor structure. The method includes the following steps. A mask stack including a first mask and a second mask is formed on a substrate. A plurality of third masks are formed. A patterned layer including first openings is formed. Portions of the second mask are removed through the first openings and the third masks to form second openings, and portions of the first mask are exposed through the second openings. A plurality of self-aligned protecting structures are formed in the second openings. Portions of the second mask exposed through the third masks are removed to form third openings, and portions of the first mask are exposed through the third openings. The portions of the first mask are removed to form a hybrid hard mask. The substrate is etched through the hybrid hard mask to form a plurality of recesses.

Claims (47)

1. A method for preparing a semiconductor pattern structure, comprising:

forming a mask stack comprising a first mask and a second mask on a substrate;

forming a plurality of third masks over the mask stack;

forming a patterned layer over the third masks, wherein the patterned layer comprises a plurality of first openings;

removing portions of the second mask through the first openings and through the third masks to form a plurality of second openings, wherein portions of the first mask are exposed through the second openings;

forming a plurality of self-aligned protecting structures in the second openings;

removing portions of the second mask exposed through the third masks to form a plurality of third openings, wherein portions of the first mask are exposed through the third openings;

removing the portions of the first mask exposed through the third openings to form a hybrid hard mask; and

etching the substrate through the hybrid hard mask to form a plurality of recesses.

2. The method of claim 1 , wherein the hybrid hard mask comprises the first mask and the second mask.

3. The method of claim 2 , wherein the hybrid hard mask further comprises at least one self-aligned protecting structure.

4. The method of claim 3 , wherein the first mask form a base for the hybrid hard mask, the at least one self-aligned protecting structure and the second mask are disposed on the first mask, and the at least one self-aligned protecting structure is sandwiched between portions of the second mask.

5. The method of claim 4 , wherein a top surface of the at least one self-aligned protecting structure is coplanar with or higher than a top surface of the second mask.

6. The method of claim 1 , wherein the third masks extend along a first direction, and the first openings extend along a second direction different from the first direction.

7. The method of claim 1 , wherein the forming of the third masks comprises:

forming a plurality of core patterns over the mask stack;

forming a plurality of spacers over sidewalls of each core pattern; and

removing the core patterns to form the third masks.

8. The method of claim 1 , wherein the forming of the patterned layer further comprises:

forming a sacrificial layer over the third masks to form an even surface over the substrate;

forming the patterned layer over the sacrificial layer; and

transferring the first openings into the sacrificial layer.

9. The method of claim 8 , further comprising removing the sacrificial layer prior to the forming of the third openings.

10. The method of claim 1 , further comprising removing portions of the third masks exposed through the first openings.

11. The method of claim 1 , further comprising forming a conductive layer to fill the recesses.

12. The method of claim 1 , further comprising forming a conductive layer to fill the recesses.

13. A method for preparing a semiconductor pattern structure, comprising:

forming a mask stack comprising a first mask and a second mask on a substrate;

forming a plurality of core patterns over the mask stack;

forming a plurality of spacers over sidewalls of each core pattern;

forming a patterned layer over the core patterns and the spacers, wherein the patterned layer comprises a plurality of first openings;

removing portions of the core patterns, portions of the spacers and portions of the second mask exposed through the first openings to form a plurality of second openings, wherein portions of the first mask are exposed through the second openings;

forming a plurality of self-aligned protecting structures in the second openings;

removing the core patterns to form a plurality of third masks exposing portions of the second mask;

removing the portions of the second mask exposed through the third masks and through the self-aligned protecting structures to form a plurality of third openings, wherein portions of the first mask are exposed through the third openings;

removing the portions of the first mask exposed through the third openings to form a hybrid hard mask; and

etching the substrate through the hybrid hard mask to form a plurality of recesses.

14. The method of claim 13 , wherein the hybrid hard mask comprises the first mask and the second mask.

15. The method of claim 14 , wherein the hybrid hard mask further comprises the self-aligned protecting structure.

16. The method of claim 15 , wherein the first mask forms a base for the hybrid hard mask, the self-aligned protecting structure and the second mask are disposed on the first mask, and the self-aligned protecting structure is sandwiched between portions of the second mask.

17. The method of claim 16 , wherein a top surface of the self-aligned protecting structure is coplanar with or higher than a top surface of the second mask.

18. The method of claim 13 , wherein the third masks extend along a first direction, and the first openings extend along a second direction different from the first direction.

19. The method of claim 13 , wherein the forming of the patterned layer further comprises:

forming a sacrificial layer over the core patterns and the spacers to form an even surface over the substrate;

forming the patterned layer over the sacrificial layer; and

transferring the first openings into the sacrificial layer.

20. The method of claim 18 , further comprising removing the sacrificial layer prior to the forming of the third openings.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2018
From: SHIH, SHING-YIH
To: NANYA TECHNOLOGY CORPORATION
Reel/Frame 047487/0441 →
Continuity (1)
Related Publication 20200144070A1 · May 7, 2020
Cited By (1)
US 12,232,312