SiC JFET logic output level-shifting using integrated-series forward-biased JFET gate-to-channel diode junctions
View Patent ↗An improved electrical circuit for logic output level shifting using SiC JFETs with resistors on the input, inverting, stage and using diode degenerated JFET sources in the output stage.
1. A silicon carbide junction field effect transistor logic output level shifting circuit receiving a drain input, a source input, and a control signal, the circuit comprising:
a resistor with a first end and a second end;
a first junction field effect transistor with a first gate, first drain, and first source;
the control signal electrically connected across the first gate and the first drain;
a second junction field effect transistor with a second gate, second drain, and second source;
the resistor second end electrically connected to the first drain and the second gate;
the drain input electrically connected to the first end and the first drain;
a first diode stack having a first anode and a first cathode;
the first anode electrically connected to the second source;
a third junction field effect transistor with a third gate, third drain, and third source:
the first cathode electrically connected to the third drain;
a second diode stack having a second anode and a second cathode;
the second anode electrically connected to the third source;
the source input electrically connected to the third gate and the second cathode.