IP Library Granted Patent US 10,395,714
Granted Patent B2
US 10,395,714 · App. 16/188,855 · Granted Aug 27, 2019

Charge sharing between memory cell plates using a conductive path

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Quick Facts
Patent No.
US 10,395,714
App. No.
16/188,855
Granted
Aug 27, 2019
Kind
B2
Abstract

Methods, systems, techniques, and devices for operating a ferroelectric memory cell or cells are described. A first ferroelectric memory cell may be used to charge a second ferroelectric memory cell by transferring charge from a plate of first ferroelectric memory cell to a plate of the second ferroelectric memory cell. In some examples, prior to the transfer of charge, the first ferroelectric memory cell may be selected for a first operation in which the first ferroelectric memory cell transitions from a charged state to a discharged state and the second ferroelectric memory cell may be selected for a second operation during which the second ferroelectric memory cell transitions from a discharged state to a charged state. The discharging of the first ferroelectric memory cell may be used to assist in charging the second ferroelectric memory cell.

Claims (58)

1. A method, comprising:

coupling a first memory cell with a second memory cell as part of a first operation;

coupling the second memory cell with a power supply as part of a second operation based at least in part on a timing of the first operation; and

transferring a first charge to the second memory cell from the first memory cell concurrently with transferring a second charge to the second memory cell from the power supply based at least in part on coupling the second memory cell with the first memory cell and the power supply.

2. The method of claim 1 , further comprising:

activating a plurality of switching components while performing at least a portion of the first operation or the second operation, wherein coupling the second memory cell with the first memory cell and the power supply is based at least in part on activating the plurality of switching components.

3. The method of claim 2 , further comprising:

activating a first switching component that is in electronic communication with a first plate of the first memory cell and a second plate of the second memory cell, wherein coupling the second memory cell with the first memory cell is based at least in part on the activating the first switching component.

4. The method of claim 1 , wherein:

the first operation and the second operation each comprise a write operation or a read operation; and

the second operation comprises a different type of operation than the first operation.

5. The method of claim 1 , wherein:

transferring the first charge from the first memory cell to the second memory cell is based at least in part on the performing the first operation; and

transferring the second charge from the power supply to the second memory cell is based at least in part on the performing the second operation.

6. The method of claim 1 , further comprising:

decoupling the first memory cell from the second memory cell after transferring the first charge to the second memory cell from the first memory cell.

7. The method of claim 6 , further comprising:

determining that a period of time has elapsed from coupling the second memory cell with the first memory cell, wherein decoupling the first memory cell from the second memory cell is based at least in part on the determining.

8. The method of claim 6 , further comprising:

determining that a voltage at the second memory cell has satisfied a threshold value, wherein decoupling the first memory cell from the second memory cell is based at least in part on the determining.

9. An apparatus, comprising:

a first memory cell;

a second memory cell;

a power supply selectively couplable with the second memory cell;

a controller operable to:

select the first memory cell as part of a first operation;

select the second memory cell as part of a second operation based at least in part on a timing of the first operation; and

simultaneously transfer charge to the second memory cell from the first memory cell and from the power supply based at least in part on the first operation and the second operation.

10. The apparatus of claim 9 , wherein the controller is further operable to:

couple the first memory cell and the second memory cell as part of the first operation; and

couple the second memory cell and the power supply as part of the second operation, wherein the simultaneously transferring charge to the second memory cell from the first memory cell and from the power supply is based at least in part on coupling the second memory cell with the first memory cell and the power supply.

11. The apparatus of claim 10 , wherein the controller is further operable to:

discharge the first memory cell during the first operation; and

charge the second memory cell during the first operation based at least in part on coupling the second memory cell with the first memory cell and discharging the first memory cell.

12. The apparatus of claim 9 , wherein:

the first operation and the second operation each comprise a write operation or a read operation; and

the second operation comprises a different type of operation than the first operation.

13. The apparatus of claim 9 , wherein the controller is further operable to:

determine that a voltage at the second memory cell has satisfied a threshold value; and

decoupling the first memory cell from the second memory cell based at least in part on the determining.

14. A method, comprising:

activating a first word line to select a first memory cell for a first operation;

activating a second word line to select a second memory cell for a second operation;

applying a voltage, based at least in part on activating the second word line, to isolate the second memory cell from a power supply; and

transferring charge from the first memory cell to the second memory cell based at least in part on the applying the voltage.

15. The method of claim 14 , further comprising:

applying a second voltage to a switching component coupled with the first memory cell and the second memory cell based at least in part on applying the voltage, wherein the transferring charge is based at least in part on the applying the second voltage.

16. The method of claim 15 , further comprising:

establishing a conductive path between the first memory cell and the second memory cell by applying the second voltage, wherein the transferring charge is based at least in part on establishing the conductive path.

17. The method of claim 15 , further comprising:

applying a third voltage to the switching component to isolate the first memory cell from the second memory cell, wherein the applying the third voltage occurs after applying the second voltage; and

applying a fourth voltage to couple the second memory cell with the power supply after the applying the third voltage.

18. The method of claim 17 , further comprising:

charging the second memory cell to a threshold voltage associated with the second operation based at least in part on the transferring charge and the coupling the second memory cell with the power supply.

19. The method of claim 14 , wherein:

the first operation comprises transitioning the first memory cell from a charged state to a discharged state; and

the second operation comprises transitioning the second memory cell from the discharged state to the charged state.

20. The method of claim 14 , wherein the transferring charge occurs during the second operation.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 051026/0568 →
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050718/0764 →
SUPPLEMENT NO. 11 TO PATENT SECURITY AGREEMENT Recorded Jan 16, 2019
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 048082/0860 →
SUPPLEMENT NO. 2 TO PATENT SECURITY AGREEMENT Recorded Jan 16, 2019
From: MICRON TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 048082/0889 →