Recessed and embedded die coreless package
View Patent ↗Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a cavity in a plating material to hold a die, attaching the die in the cavity, forming a dielectric material adjacent the die, forming vias in the dielectric material adjacent the die, forming PoP lands in the vias, forming interconnects in the vias, and then removing the plating material to expose the PoP lands and die, wherein the die is disposed above the PoP lands.
1. A method comprising:
forming a dielectric layer having a top surface and a fillet structure extending from the dielectric layer top surface;
embedding, at least partially, a die in the fillet structure of the dielectric layer, wherein the die includes a top surface, first and second sidewalls, and an active surface opposite the top surface, wherein the fillet structure of the dielectric layer has a sloped portion extending from the top surface of the dielectric layer to a position adjacent the top surface of the die, wherein embedding the die in the fillet structure includes providing the top surface of the die to be free from the dielectric layer and substantially coplanar with the top surface of the dielectric layer, and surrounding the first and second sidewalls and the active surface of the die with the fillet structure of the dielectric layer;
forming a package-on-package land area adjacent the fillet structure at the top surface of the dielectric layer;
forming a package-on-package land interconnect structure extending into the dielectric layer and electrically connected to the package-on-package land area, to receive another package structure in response to attachment of the other package structure to a package structure; and
forming an interconnect structure extending into the dielectric layer and electrically connected to the active surface of the die.
2. The method of claim 1 , wherein the dielectric layer is a first dielectric layer, wherein the method further comprises forming at least one additional second dielectric layer on the first dielectric layer and forming a metallization layer extending through the at least one additional second dielectric layer to electrically contact at least one of the package-on-package interconnect structure and the interconnect structure.
3. The method of claim 1 , further comprising forming an adhesive film on the top surface of the die.