IP Library Granted Patent US 12,505,275
Granted Patent B2
US 12,505,275 · App. 16/194,839 · Granted Dec 23, 2025

Communication protocols design verification through database systems for hardware-based emulation platforms

Inventors: Georges Antoun Elias Ghattas (Cairo, EG); John Samir Ramses Wasef (Cairo, EG); Mohamed Ahmed Mostafa Shaaban (Cairo, EG)
Assignee: Siemens Industry Software Inc.
G06F30/398G06F11/261G06F11/27
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,505,275
App. No.
16/194,839
Granted
Dec 23, 2025
Kind
B2
Abstract

A system may include a hardware-based emulation platform configured to emulate operation of a design-under-test (“DUT”), a database system, and a verification system. The verification system may include a storage system which may include a memory layer and a local storage layer, where the memory layer has a lower memory access latency than the local storage layer. The verification system may also include a design verification engine configured to send test data to the hardware-based emulation platform; buffer response data received from the DUT into the memory layer and the local storage layer; determine to aggregate the response data stored in both the memory layer and local storage layer into a write transaction according to buffering criteria, and issue the write transaction to the database system to store the aggregated response data in the database system.

Claims (37)

1 . A method comprising:

by a computing system:

sending test data to a hardware-based emulation platform configured to emulate operation of a design-under-test (“DUT”), wherein the test data is configured with verification settings to test different communication protocols for the DUT;

receiving response data from the hardware-based emulation platform;

buffering the response data into different memories of the computing system, including a memory layer and local storage layer, wherein the memory layer has a lower memory access latency than the local storage layer;

determining to aggregate the response data stored in both the memory layer and local storage layer into a write transaction according to buffering criteria, the buffering criteria based on a communication speed of the hardware-based emulation platform, a remaining capacity of the memory layer, a remaining capacity of the local storage layer, or a combination thereof; and

issuing the write transaction to a database system to store the aggregated response data in the database system.

2 . The method of claim 1 , wherein buffering the response data into the memory layer and the local storage layer comprises:

prioritizing storing the response data in the memory layer until the memory layer reaches a stored capacity threshold.

3 . The method of claim 2 , comprising receiving the response data at a communication rate higher than a maximum access rate of the memory layer; and

wherein prioritizing storing the response data in the memory layer comprises:

inserting a portion of the received response data into the memory layer at the maximum access rate of the memory layer; and

storing a remaining portion of the received response data in the local storage layer.

4 . The method of claim 2 , wherein buffering the response data into the memory layer and the local storage layer further comprises:

periodically flushing the response data stored in the memory layer into the local storage layer.

5 . The method of claim 1 , further comprising disabling exception reporting on write transactions for the database system such that any associated errors for the write transaction issued to the database system are not reported to the computing system.

6 . The method of claim 1 , wherein the database system implements an unstructured database to store response data from the DUT; and further comprising:

querying the response data of the DUT stored in the unstructured database to acquire performance data for the different communication protocols tested for the DUT.

7 . The method of claim 6 , wherein the performance data comprises a number of overall packets in the response data, latency data for communication ports of the hardware-based emulation platform specific to the DUT, port assignments for the different communication protocols, communication bandwidth and latency for the DUT, port-level benchmarking data, design-level benchmarking data, flow-level benchmarking data, or any combination thereof.

8 . A non-transitory machine-readable storing instructions that, when executed by a processor, cause a computing system to:

send test data to a hardware-based emulation platform configured to emulate operation of a design-under-test (“DUT”), wherein the test data is configured with verification settings to test different communication protocols for the DUT;

receive response data from the hardware-based emulation platform;

buffer the response data into different memories of the computing system, including a memory layer and local storage layer, wherein the memory layer has a lower memory access latency than the local storage layer;

determine to aggregate the response data stored in both the memory layer and local storage layer into a write transaction according to buffering criteria, the buffering criteria based on a communication speed of the hardware-based emulation platform, a remaining capacity of the memory layer, a remaining capacity of the local storage layer, or a combination thereof; and

issue the write transaction to a database system to store the aggregated response data in the database system.

9 . The non-transitory machine-readable medium of claim 8 , wherein the instructions to buffer the response data into the memory layer and the local storage layer comprise instructions that, when executed by the processor, cause the computing system to:

prioritize storing the response data in the memory layer until the memory layer reaches a stored capacity threshold.

10 . The non-transitory machine-readable medium of claim 9 , the instructions to receive the response data cause the computing system to receive respond data at a communication rate higher than a maximum access rate of the memory layer; and

wherein the instructions to prioritize storing the response data in the memory layer comprise instructions that, when executed, cause the computing system to:

insert a portion of the received response data into the memory layer at the maximum access rate of the memory layer; and

store a remaining portion of the received response data in the local storage layer.

11 . The non-transitory machine-readable medium of claim 9 , further comprising instructions that, when executed by the processor, cause the computing system to periodically flush the response data stored in the memory layer into the local storage layer, flush the response data stored in the memory layer into the local storage layer when the memory layer reaches a threshold storage capacity, or a combination of both.

12 . The non-transitory machine-readable medium of claim 8 , further comprising instructions that, when executed by the processor, cause the computing system to disable exception reporting on write transactions for the database system such that any associated errors for the write transaction issued to the database system are not reported.

13 . The non-transitory machine-readable medium of claim 8 , wherein:

the database system implements an unstructured database to store response data from the DUT; and

the response data of the DUT stored in the unstructured database comprises packet data according to the different communication protocols tested for the DUT; and

further comprising instructions that, when executed by the processor, cause the computing system to query the response data of the DUT stored in the unstructured database to acquire performance data for the different communication protocols tested for the DUT.

Assignments (3)
MERGER AND CHANGE OF NAME Recorded Jun 29, 2021
From: MENTOR GRAPHICS CORPORATION; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 056713/0076 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 16, 2019
From: GHATTAS, GEORGES ANTOUN ELIAS; WASEF, JOHN SAMIR RAMSES; SHAABAN, MOHAMED AHMED MOSTAFA
To: MENTOR GRAPHICS EGYPT
Reel/Frame 048024/0706 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 16, 2019
From: MENTOR GRAPHICS EGYPT
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 048024/0925 →